LPC1313FBD48,151 NXP Semiconductors, LPC1313FBD48,151 Datasheet - Page 9

• Manufacturer Part Number: LPC1313FBD48,151
• Description: IC MCU 32BIT 32KB FLASH 48LQFP
• Manufacturer: NXP Semiconductors
• Series: LPC13xxr

Specifications of LPC1313FBD48,151

• Program Memory Type: FLASH
• Program Memory Size: 32KB (32K x 8)
• Package / Case: 48-LQFP
• Core Processor: ARM® Cortex-M3™
• Core Size: 32-Bit
• Speed: 72MHz
• Connectivity: I²C, Microwire, SPI, SSI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, WDT
• Number Of I /o: 42
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 3.6 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Processor Series: LPC13
• Core: ARM Cortex M3
• Data Bus Width: 32 bit
• Interface Type: I2C, UART
• Maximum Clock Frequency: 72 MHz
• Number Of Timers: 2
• Operating Supply Voltage: 3.3 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: MDK-ARM, RL-ARM, ULINK2
• Development Tools By Supplier: OM11041
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 8 Channel
• Cpu Family: LPC1000
• Device Core: ARM Cortex-M3
• Device Core Size: 32b
• Frequency (max): 72MHz
• Total Internal Ram Size: 8KB
• # I/os (max): 42
• Number Of Timers - General Purpose: 4
• Operating Supply Voltage (typ): 3.3V
• Operating Supply Voltage (max): 3.6V
• Operating Supply Voltage (min): 2V
• Instruction Set Architecture: RISC
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 48
• Package Type: LQFP
• Package: 48LQFP
• Family Name: LPC1000
• Maximum Speed: 72 MHz
• Number Of Programmable I/os: 42
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: 568-4918 - KIT DEV FOR LPC1313622-1005 - USB IN-CIRCUIT PROG ARM7 LPC2K
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 568-4914; 935289651151

3.1 How to read this chapter
UM10375
User manual
The system configuration registers apply to all LPC13xx parts with the following
exceptions:
Input pins to the start logic
For HVQFN packages, the start logic control bits (see
for port pins PIO2_1 to PIO2_11 and PIO3_0, PIO3_1, and PIO3_3.
PIO reset status registers
For HVQFN packages, the reset status bits (see
port pins PIO2_1 to PIO2_11 and PIO3_0 and PIO3_1, and PIO3_3.
USB clocking and power control
Since the USB block is available on the LPC1342 and LPC1343 only, the registers and
register bits listed in
Table 3.
Name
USBPLLCTRL
USBPLLSTAT
USBPLLCLKSEL
USBPLLCLKUEN
SYSAHBCLKCTRL R/W
USBCLKSEL
USBCLKUEN
USBCLKDIV
PDSLEEPCFG
PDAWAKECFG
PDRUNCFG
UM10375
Chapter 3: LPC13xx System configuration
Rev. 2 — 7 July 2010
USB related registers and register bits reserved for LPC1311/13
All information provided in this document is subject to legal disclaimers.
R/W
Access Address
R/W
R
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Table 3
Rev. 2 — 7 July 2010
are reserved for parts LPC1311 and LPC1313:
offset
0x010
0x014
0x048
0x04C
0x080
0x0C0
0x0C4
0x0C8
0x230
0x234
0x238
Description
USB PLL control
USB PLL status
USB PLL clock source select
USB PLL clock source update enable
System AHB clock control
USB clock source select
USB clock source update enable
USB clock source divider
Power-down states in Deep-sleep
mode
Power-down states after wake-up from
Deep-sleep mode
Power-down configuration register
Table 37
Table 41
and
Table
to
Table
38) are reserved for
© NXP B.V. 2010. All rights reserved.
48) are reserved
User manual
all
all
all
all
bits 8 and 10
Register bits
reserved for
LPC1311/13
all
bit 14
all
all
bits 8 and 10
bits 8 and 10
10 of 333