LPC1313FBD48,151 NXP Semiconductors, LPC1313FBD48,151 Datasheet - Page 49

• Manufacturer Part Number: LPC1313FBD48,151
• Description: IC MCU 32BIT 32KB FLASH 48LQFP
• Manufacturer: NXP Semiconductors
• Series: LPC13xxr

Specifications of LPC1313FBD48,151

• Program Memory Type: FLASH
• Program Memory Size: 32KB (32K x 8)
• Package / Case: 48-LQFP
• Core Processor: ARM® Cortex-M3™
• Core Size: 32-Bit
• Speed: 72MHz
• Connectivity: I²C, Microwire, SPI, SSI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, WDT
• Number Of I /o: 42
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 3.6 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Processor Series: LPC13
• Core: ARM Cortex M3
• Data Bus Width: 32 bit
• Interface Type: I2C, UART
• Maximum Clock Frequency: 72 MHz
• Number Of Timers: 2
• Operating Supply Voltage: 3.3 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: MDK-ARM, RL-ARM, ULINK2
• Development Tools By Supplier: OM11041
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 8 Channel
• Cpu Family: LPC1000
• Device Core: ARM Cortex-M3
• Device Core Size: 32b
• Frequency (max): 72MHz
• Total Internal Ram Size: 8KB
• # I/os (max): 42
• Number Of Timers - General Purpose: 4
• Operating Supply Voltage (typ): 3.3V
• Operating Supply Voltage (max): 3.6V
• Operating Supply Voltage (min): 2V
• Instruction Set Architecture: RISC
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 48
• Package Type: LQFP
• Package: 48LQFP
• Family Name: LPC1000
• Maximum Speed: 72 MHz
• Number Of Programmable I/os: 42
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: 568-4918 - KIT DEV FOR LPC1313622-1005 - USB IN-CIRCUIT PROG ARM7 LPC2K
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 568-4914; 935289651151

NXP Semiconductors
3.11 Flash memory access
UM10375
User manual
3.10.4.2 Power-down mode
Table 55.
In this mode, the internal current reference will be turned off, the oscillator and the
phase-frequency detector will be stopped and the dividers will enter a reset state. While in
Power-down mode, the lock output will be low, to indicate that the PLL is not in lock. When
the Power-down mode is terminated by SYSPLL_PD (or USBPLL_PD) bits to zero in the
Power-down configuration register
and will make the lock signal high once it has regained lock on the input clock.
Depending on the system clock frequency, access to the flash memory can be configured
with various access times by writing to the FLASHCFG register at address 0x4003 C010.
This register is part of the flash controller block (see
Remark: Improper setting of this register may result in incorrect operation of the LPC13xx
flash memory.
Table 56.
PLL input
clock
sys_pllclkin
(Fclkin)
12 MHz
12 MHz
12 MHz
12 MHz
Bit
1:0
31:2 -
Symbol
FLASHTIM
PLL configuration examples
Flash configuration register (FLASHCFG, address 0x4003 C010) bit description
All information provided in this document is subject to legal disclaimers.
Main clock
(Fclkout)
72 MHz
48 MHz
36 MHz
24 MHz
Value Description
00
01
10
11
-
Rev. 2 — 7 July 2010
Flash memory access time. FLASHTIM +1 is equal to the
number of system clocks used for flash access.
1 system clock flash access time (for system clock
frequencies of up to 20 MHz).
2 system clocks flash access time (for system clock
frequencies of up to 40 MHz).
3 system clocks flash access time (for system clock
frequencies of up to 72 MHz).
Reserved.
Reserved. User software must not change the value of
these bits. Bits 31:2 must be written back exactly as read.
MSEL bits
Table 8
00101
00011
00010
00001
(Table
52), the PLL will resume its normal operation
M divider
value
6
4
3
2
Chapter 3: LPC13xx System configuration
Figure
01
01
10
10
PSEL bits
Table 8
2).
P divider
value
2
2
4
4
UM10375
© NXP B.V. 2010. All rights reserved.
FCCO
frequency
288 MHz
192 MHz
288 MHz
192 MHz
50 of 333
Reset
value
10
<tbd>