LPC1313FBD48,151 NXP Semiconductors, LPC1313FBD48,151 Datasheet - Page 140

• Manufacturer Part Number: LPC1313FBD48,151
• Description: IC MCU 32BIT 32KB FLASH 48LQFP
• Manufacturer: NXP Semiconductors
• Series: LPC13xxr

Specifications of LPC1313FBD48,151

• Program Memory Type: FLASH
• Program Memory Size: 32KB (32K x 8)
• Package / Case: 48-LQFP
• Core Processor: ARM® Cortex-M3™
• Core Size: 32-Bit
• Speed: 72MHz
• Connectivity: I²C, Microwire, SPI, SSI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, WDT
• Number Of I /o: 42
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 3.6 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Processor Series: LPC13
• Core: ARM Cortex M3
• Data Bus Width: 32 bit
• Interface Type: I2C, UART
• Maximum Clock Frequency: 72 MHz
• Number Of Timers: 2
• Operating Supply Voltage: 3.3 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: MDK-ARM, RL-ARM, ULINK2
• Development Tools By Supplier: OM11041
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 8 Channel
• Cpu Family: LPC1000
• Device Core: ARM Cortex-M3
• Device Core Size: 32b
• Frequency (max): 72MHz
• Total Internal Ram Size: 8KB
• # I/os (max): 42
• Number Of Timers - General Purpose: 4
• Operating Supply Voltage (typ): 3.3V
• Operating Supply Voltage (max): 3.6V
• Operating Supply Voltage (min): 2V
• Instruction Set Architecture: RISC
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 48
• Package Type: LQFP
• Package: 48LQFP
• Family Name: LPC1000
• Maximum Speed: 72 MHz
• Number Of Programmable I/os: 42
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: 568-4918 - KIT DEV FOR LPC1313622-1005 - USB IN-CIRCUIT PROG ARM7 LPC2K
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 568-4914; 935289651151

NXP Semiconductors
UM10375
User manual
9.11.1 Set Address (Command: 0xD0, Data: write 1 byte)
9.11.2 Configure Device (Command: 0xD8, Data: write 1 byte)
9.11.3 Set Mode (Command: 0xF3, Data: write 1 byte)
The Set Address command is used to set the USB assigned address and enable the
(embedded) function. The address set in the device will take effect after the status stage
of the control transaction. After a bus reset, DEV_ADDR is set to 0x00, and DEV_EN is
set to 1. The device will respond to packets for function address 0x00, endpoint 0 (default
endpoint).
Table 169. Device Set Address command description
A value of 1 written to the register indicates that the device is configured and all the
enabled non-control endpoints will respond. Control endpoints are always enabled and
respond even if the device is not configured, in the default state.
Table 170. Configure Device command description
Table 171. Set Mode command description
Bit
6:0
7
Bit
0
7:1
Bit Symbol
0
1
AP_CLK
INAK_CI
Symbol
CONF_DEVICE
-
Symbol
DEV_ADDR
DEV_EN
All information provided in this document is subject to legal disclaimers.
Value Description
0
1
0
1
Always PLL Clock.
USB_NEED_CLK is functional; the 48 MHz clock can be
stopped when the device enters suspend state.
USB_NEED_CLK is fixed to 1; the 48 MHz clock cannot be
stopped when the device enters suspend state.
Interrupt on NAK for Control IN endpoint.
Only successful transactions generate an interrupt.
Both successful and NAKed IN transactions generate interrupts.
Rev. 2 — 7 July 2010
Device is configured. All enabled non-control endpoints will
Reserved, user software should not write ones to reserved
Description
respond. This bit is cleared by hardware when a bus reset
occurs. When set, the UP_LED signal is driven LOW if the
device is not in the suspended state (SUS=0).
bits. The value read from a reserved bit is not defined.
Description
Device address set by the software. After a bus reset this
field is set to 0x00.
Device Enable. After a bus reset this bit is set to 1.
0: Device will not respond to any packets.
1: Device will respond to packets for function address
DEV_ADDR.
Chapter 9: LPC13xx USB device controller
UM10375
© NXP B.V. 2010. All rights reserved.
Reset
value
0x00
0
142 of 333
Reset
value
NA
0
Reset
value
0