LPC1313FBD48,151 NXP Semiconductors, LPC1313FBD48,151 Datasheet - Page 234

• Manufacturer Part Number: LPC1313FBD48,151
• Description: IC MCU 32BIT 32KB FLASH 48LQFP
• Manufacturer: NXP Semiconductors
• Series: LPC13xxr

Specifications of LPC1313FBD48,151

• Program Memory Type: FLASH
• Program Memory Size: 32KB (32K x 8)
• Package / Case: 48-LQFP
• Core Processor: ARM® Cortex-M3™
• Core Size: 32-Bit
• Speed: 72MHz
• Connectivity: I²C, Microwire, SPI, SSI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, WDT
• Number Of I /o: 42
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 3.6 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Processor Series: LPC13
• Core: ARM Cortex M3
• Data Bus Width: 32 bit
• Interface Type: I2C, UART
• Maximum Clock Frequency: 72 MHz
• Number Of Timers: 2
• Operating Supply Voltage: 3.3 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: MDK-ARM, RL-ARM, ULINK2
• Development Tools By Supplier: OM11041
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 8 Channel
• Cpu Family: LPC1000
• Device Core: ARM Cortex-M3
• Device Core Size: 32b
• Frequency (max): 72MHz
• Total Internal Ram Size: 8KB
• # I/os (max): 42
• Number Of Timers - General Purpose: 4
• Operating Supply Voltage (typ): 3.3V
• Operating Supply Voltage (max): 3.6V
• Operating Supply Voltage (min): 2V
• Instruction Set Architecture: RISC
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 48
• Package Type: LQFP
• Package: 48LQFP
• Family Name: LPC1000
• Maximum Speed: 72 MHz
• Number Of Programmable I/os: 42
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: 568-4918 - KIT DEV FOR LPC1313622-1005 - USB IN-CIRCUIT PROG ARM7 LPC2K
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 568-4914; 935289651151

NXP Semiconductors
13.5 Pin description
UM10375
User manual
Table 233. SSP pin descriptions
Pin
name
SCK
SSEL
MISO
MOSI
Type
I/O
I/O
I/O
I/O
All information provided in this document is subject to legal disclaimers.
Interface pin
name/function
SPI
SCK
SSEL FS
MISO DR(M)
MOSI DX(M)
SSI
CLK
DX(S)
DR(S)
Rev. 2 — 7 July 2010
Microwire
SK
CS
SI(M)
SO(S)
SO(M)
SI(S)
Pin description
Serial Clock. SCK/CLK/SK is a clock signal used
to synchronize the transfer of data. It is driven by
the master and received by the slave. When SPI
interface is used, the clock is programmable to be
active-high or active-low, otherwise it is always
active-high. SCK only switches during a data
transfer. Any other time, the SSP interface either
holds it in its inactive state or does not drive it
(leaves it in high-impedance state).
Frame Sync/Slave Select. When the SSP
interface is a bus master, it drives this signal to an
active state before the start of serial data and then
releases it to an inactive state after the data has
been sent.The active state of this signal can be
high or low depending upon the selected bus and
mode. When the SSP interface is a bus slave, this
signal qualifies the presence of data from the
Master according to the protocol in use.
When there is just one bus master and one bus
slave, the Frame Sync or Slave Select signal from
the Master can be connected directly to the slave’s
corresponding input. When there is more than one
slave on the bus, further qualification of their Frame
Select/Slave Select inputs will typically be
necessary to prevent more than one slave from
responding to a transfer.
Master In Slave Out. The MISO signal transfers
serial data from the slave to the master. When the
SSP0 is a slave, serial data is output on this signal.
When the SSP0 is a master, it clocks in serial data
from this signal. When the SSP0 is a slave and is
not selected by FS/SSEL, it does not drive this
signal (leaves it in high-impedance state).
Master Out Slave In. The MOSI signal transfers
serial data from the master to the slave. When the
SSP0 is a master, it outputs serial data on this
signal. When the SSP0 is a slave, it clocks in serial
data from this signal.
Chapter 13: LPC13xx SSP
UM10375
© NXP B.V. 2010. All rights reserved.
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