LPC1313FBD48,151 NXP Semiconductors, LPC1313FBD48,151 Datasheet - Page 72

• Manufacturer Part Number: LPC1313FBD48,151
• Description: IC MCU 32BIT 32KB FLASH 48LQFP
• Manufacturer: NXP Semiconductors
• Series: LPC13xxr

Specifications of LPC1313FBD48,151

• Program Memory Type: FLASH
• Program Memory Size: 32KB (32K x 8)
• Package / Case: 48-LQFP
• Core Processor: ARM® Cortex-M3™
• Core Size: 32-Bit
• Speed: 72MHz
• Connectivity: I²C, Microwire, SPI, SSI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, WDT
• Number Of I /o: 42
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 3.6 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Processor Series: LPC13
• Core: ARM Cortex M3
• Data Bus Width: 32 bit
• Interface Type: I2C, UART
• Maximum Clock Frequency: 72 MHz
• Number Of Timers: 2
• Operating Supply Voltage: 3.3 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: MDK-ARM, RL-ARM, ULINK2
• Development Tools By Supplier: OM11041
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 8 Channel
• Cpu Family: LPC1000
• Device Core: ARM Cortex-M3
• Device Core Size: 32b
• Frequency (max): 72MHz
• Total Internal Ram Size: 8KB
• # I/os (max): 42
• Number Of Timers - General Purpose: 4
• Operating Supply Voltage (typ): 3.3V
• Operating Supply Voltage (max): 3.6V
• Operating Supply Voltage (min): 2V
• Instruction Set Architecture: RISC
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 48
• Package Type: LQFP
• Package: 48LQFP
• Family Name: LPC1000
• Maximum Speed: 72 MHz
• Number Of Programmable I/os: 42
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: 568-4918 - KIT DEV FOR LPC1313622-1005 - USB IN-CIRCUIT PROG ARM7 LPC2K
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 568-4914; 935289651151

NXP Semiconductors
UM10375
User manual
5.6.21 Interrupt Priority Register 10
5.6.22 Interrupt Priority Register 11
The IPR10 register controls the priority of four peripheral interrupts. Each interrupt can
have one of 32 priorities, where 0 is the highest priority.
Table 83.
The IPR11 register controls the priority of four peripheral interrupts. Each interrupt can
have one of 32 priorities, where 0 is the highest priority.
Table 84.
Bit
2:0
7:3
10:8
15:11 IP_CT16B0
18:16 Unimplemented
23:19 IP_CT16B1
26:24 Unimplemented
31:27 IP_CT32B0
Bit
2:0
7:3
10:8
15:11 IP_SSP
18:16 Unimplemented
23:19 IP_UART
26:24 Unimplemented
31:27 IP_USBIRQ
Unimplemented
IP_I2C
Unimplemented
IP_CT32B1
Name
Unimplemented
Name
Unimplemented
Interrupt Priority Register 10 (IPR10 - address 0xE000 E428) bit description
Interrupt Priority Register 11 (IPR11 - address 0xE000 E42C) bit description
All information provided in this document is subject to legal disclaimers.
Description
These bits ignore writes, and read as 0.
I2C Interrupt Priority. 0 = highest priority. 31 (0x1F) = lowest priority.
These bits ignore writes, and read as 0.
CT16B0 Interrupt Priority. 0 = highest priority. 31 (0x1F) = lowest
priority.
These bits ignore writes, and read as 0.
CT16B1 Interrupt Priority. 0 = highest priority. 31 (0x1F) = lowest
priority.
These bits ignore writes, and read as 0.
CT32B0 Interrupt Priority. 0 = highest priority. 31 (0x1F) = lowest
priority.
Description
These bits ignore writes, and read as 0.
CT32B1 Interrupt Priority. 0 = highest priority. 31 (0x1F) = lowest
priority.
These bits ignore writes, and read as 0.
SSP Interrupt Priority. 0 = highest priority. 31 (0x1F) = lowest priority.
These bits ignore writes, and read as 0.
UART Interrupt Priority. 0 = highest priority. 31 (0x1F) = lowest priority.
These bits ignore writes, and read as 0.
USBIRQ Interrupt Priority. 0 = highest priority. 31 (0x1F) = lowest
priority.
Rev. 2 — 7 July 2010
Chapter 5: LPC13xx Interrupt controller
UM10375
© NXP B.V. 2010. All rights reserved.
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