LPC1313FBD48,151 NXP Semiconductors, LPC1313FBD48,151 Datasheet - Page 65

• Manufacturer Part Number: LPC1313FBD48,151
• Description: IC MCU 32BIT 32KB FLASH 48LQFP
• Manufacturer: NXP Semiconductors
• Series: LPC13xxr

Specifications of LPC1313FBD48,151

• Program Memory Type: FLASH
• Program Memory Size: 32KB (32K x 8)
• Package / Case: 48-LQFP
• Core Processor: ARM® Cortex-M3™
• Core Size: 32-Bit
• Speed: 72MHz
• Connectivity: I²C, Microwire, SPI, SSI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, WDT
• Number Of I /o: 42
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 3.6 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Processor Series: LPC13
• Core: ARM Cortex M3
• Data Bus Width: 32 bit
• Interface Type: I2C, UART
• Maximum Clock Frequency: 72 MHz
• Number Of Timers: 2
• Operating Supply Voltage: 3.3 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: MDK-ARM, RL-ARM, ULINK2
• Development Tools By Supplier: OM11041
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 8 Channel
• Cpu Family: LPC1000
• Device Core: ARM Cortex-M3
• Device Core Size: 32b
• Frequency (max): 72MHz
• Total Internal Ram Size: 8KB
• # I/os (max): 42
• Number Of Timers - General Purpose: 4
• Operating Supply Voltage (typ): 3.3V
• Operating Supply Voltage (max): 3.6V
• Operating Supply Voltage (min): 2V
• Instruction Set Architecture: RISC
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 48
• Package Type: LQFP
• Package: 48LQFP
• Family Name: LPC1000
• Maximum Speed: 72 MHz
• Number Of Programmable I/os: 42
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: 568-4918 - KIT DEV FOR LPC1313622-1005 - USB IN-CIRCUIT PROG ARM7 LPC2K
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 568-4914; 935289651151

NXP Semiconductors
UM10375
User manual
5.6.9 Interrupt Active Bit Register 0
The IABR0 register is a read-only register that allows reading the active state of the first
32 peripheral interrupts. This allows determining which peripherals are asserting an
interrupt to the NVIC, and may also be pending if there are enabled. The remaining
interrupts can have their active state read via the IABR1 register
The bit description is as follows for all bits in this register:
Write — n/a.
Read — 0 indicates that the interrupt is not active, 1 indicates that the interrupt is active.
Table 71.
Bit
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
Name
IAB_PIO0_0
IAB_PIO0_1
IAB_PIO0_2
IAB_PIO0_3
IAB_PIO0_4
IAB_PIO0_5
IAB_PIO0_6
IAB_PIO0_7
IAB_PIO0_8
IAB_PIO0_9
IAB_PIO0_10
IAB_PIO0_11
IAB_PIO1_0
IAB_PIO1_1
IAB_PIO1_2
IAB_PIO1_3
IAB_PIO1_4
IAB_PIO1_5
IAB_PIO1_6
IAB_PIO1_7
IAB_PIO1_8
IAB_PIO1_9
IAB_PIO1_10
IAB_PIO1_11
IAB_PIO2_0
IAB_PIO2_1
IAB_PIO2_2
IAB_PIO2_3
IAB_PIO2_4
IAB_PIO2_5
IAB_PIO2_6
IAB_PIO2_7
Interrupt Active Bit Register 0 (IABR0 - address 0xE000 E300) bit description
All information provided in this document is subject to legal disclaimers.
Function
PIO0_0 start logic input interrupt active.
PIO0_1 start logic input interrupt active.
PIO0_2 start logic input interrupt active.
PIO0_3 start logic input interrupt active.
PIO0_4 start logic input interrupt active.
PIO0_5 start logic input interrupt active.
PIO0_6 start logic input interrupt active.
PIO0_7 start logic input interrupt active.
PIO0_8 start logic input interrupt active.
PIO0_9 start logic input interrupt active.
PIO0_10 start logic input interrupt active.
PIO0_11 start logic input interrupt active.
PIO1_0 start logic input interrupt active.
PIO1_1 start logic input interrupt active.
PIO1_2 start logic input interrupt active.
PIO1_3 start logic input interrupt active.
PIO1_4 start logic input interrupt active.
PIO1_5 start logic input interrupt active.
PIO1_6 start logic input interrupt active.
PIO1_7 start logic input interrupt active.
PIO1_8 start logic input interrupt active.
PIO1_9 start logic input interrupt active.
PIO1_10 start logic input interrupt active.
PIO1_11 start logic input interrupt active.
PIO2_0 start logic input interrupt active.
PIO2_1 start logic input interrupt active.
PIO2_2 start logic input interrupt active.
PIO2_3 start logic input interrupt active.
PIO2_4 start logic input interrupt active.
PIO2_5 start logic input interrupt active.
PIO2_6 start logic input interrupt active.
PIO2_7 start logic input interrupt active.
Rev. 2 — 7 July 2010
Chapter 5: LPC13xx Interrupt controller
(Section
UM10375
© NXP B.V. 2010. All rights reserved.
5.6.10).
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