LPC1313FBD48,151 NXP Semiconductors, LPC1313FBD48,151 Datasheet - Page 36

• Manufacturer Part Number: LPC1313FBD48,151
• Description: IC MCU 32BIT 32KB FLASH 48LQFP
• Manufacturer: NXP Semiconductors
• Series: LPC13xxr

Specifications of LPC1313FBD48,151

• Program Memory Type: FLASH
• Program Memory Size: 32KB (32K x 8)
• Package / Case: 48-LQFP
• Core Processor: ARM® Cortex-M3™
• Core Size: 32-Bit
• Speed: 72MHz
• Connectivity: I²C, Microwire, SPI, SSI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, WDT
• Number Of I /o: 42
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 3.6 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Processor Series: LPC13
• Core: ARM Cortex M3
• Data Bus Width: 32 bit
• Interface Type: I2C, UART
• Maximum Clock Frequency: 72 MHz
• Number Of Timers: 2
• Operating Supply Voltage: 3.3 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: MDK-ARM, RL-ARM, ULINK2
• Development Tools By Supplier: OM11041
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 8 Channel
• Cpu Family: LPC1000
• Device Core: ARM Cortex-M3
• Device Core Size: 32b
• Frequency (max): 72MHz
• Total Internal Ram Size: 8KB
• # I/os (max): 42
• Number Of Timers - General Purpose: 4
• Operating Supply Voltage (typ): 3.3V
• Operating Supply Voltage (max): 3.6V
• Operating Supply Voltage (min): 2V
• Instruction Set Architecture: RISC
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 48
• Package Type: LQFP
• Package: 48LQFP
• Family Name: LPC1000
• Maximum Speed: 72 MHz
• Number Of Programmable I/os: 42
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: 568-4918 - KIT DEV FOR LPC1313622-1005 - USB IN-CIRCUIT PROG ARM7 LPC2K
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 568-4914; 935289651151

NXP Semiconductors
UM10375
User manual
3.5.43 Start logic status register 1
Table 47.
This register reflects the status of the enabled start signals. The bit assignment is identical
to
Table 48.
Bit
0
3:1
4
7:5
31:8 -
Bit
0
3:1
4
7:5
31:8 -
Table
Symbol
RSRPIO2_8
RSRPIO2_11
to RSPIO2_9
RSRPIO3_0
RSRPIO3_3
to
RSRPIO3_1
Symbol
SRPIO2_8
SRPIO2_11 to
SRPIO2_7
SRPIO3_0
SRPIO3_3 to
SRPIO3_1
45.
Start logic reset register 1 (STARTRSRP1CLR, address 0x4004 8218) bit
description
Start logic signal status register 1 (STARTSRP1, address 0x4004 821C) bit
description
All information provided in this document is subject to legal disclaimers.
Value
0
1
0
1
0
1
0
1
-
Value
0
1
0
1
0
1
0
1
-
Rev. 2 — 7 July 2010
Description
Start signal reset for start logic input PIO2_8
-
Write: reset start signal
Start signal reset for start logic input PIO2_11 to
PIO2_9
-
Write: reset start signal
Start signal reset for start logic input PIO3_0
-
Write: reset start signal
Start signal reset for start logic input PIO3_3 to PIO3_1 n/a
-
Write: reset start signal
Reserved
Description
Start signal status for start logic input PIO2_8
No start signal received
Start signal pending
Start signal status for start logic input PIO2_11 to
PIO2_7
No start signal received
Start signal pending
Start signal status for start logic input PIO3_0
No start signal received
Start signal pending
Start signal status for start logic input PIO3_3 to
PIO3_1
No start signal received
Start signal pending
Reserved
Chapter 3: LPC13xx System configuration
UM10375
© NXP B.V. 2010. All rights reserved.
Reset
value
n/a
n/a
n/a
n/a
Reset
value
n/a
n/a
n/a
n/a
n/a
37 of 333