LPC1313FBD48,151 NXP Semiconductors, LPC1313FBD48,151 Datasheet - Page 291

IC MCU 32BIT 32KB FLASH 48LQFP

LPC1313FBD48,151

Manufacturer Part Number
LPC1313FBD48,151
Description
IC MCU 32BIT 32KB FLASH 48LQFP
Manufacturer
NXP Semiconductors
Series
LPC13xxr
Datasheets

Specifications of LPC1313FBD48,151

Program Memory Type
FLASH
Program Memory Size
32KB (32K x 8)
Package / Case
48-LQFP
Core Processor
ARM® Cortex-M3™
Core Size
32-Bit
Speed
72MHz
Connectivity
I²C, Microwire, SPI, SSI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, WDT
Number Of I /o
42
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
2 V ~ 3.6 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Processor Series
LPC13
Core
ARM Cortex M3
Data Bus Width
32 bit
Interface Type
I2C, UART
Maximum Clock Frequency
72 MHz
Number Of Timers
2
Operating Supply Voltage
3.3 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
MDK-ARM, RL-ARM, ULINK2
Development Tools By Supplier
OM11041
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 8 Channel
Cpu Family
LPC1000
Device Core
ARM Cortex-M3
Device Core Size
32b
Frequency (max)
72MHz
Total Internal Ram Size
8KB
# I/os (max)
42
Number Of Timers - General Purpose
4
Operating Supply Voltage (typ)
3.3V
Operating Supply Voltage (max)
3.6V
Operating Supply Voltage (min)
2V
Instruction Set Architecture
RISC
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
48
Package Type
LQFP
Package
48LQFP
Family Name
LPC1000
Maximum Speed
72 MHz
Number Of Programmable I/os
42
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
568-4918 - KIT DEV FOR LPC1313622-1005 - USB IN-CIRCUIT PROG ARM7 LPC2K
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
568-4914
935289651151

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NXP Semiconductors
19.8 ISP/IAP communication protocol
UM10375
User manual
19.8.1 ISP command format
19.8.2 ISP response format
19.8.3 ISP data format
If the signature is not valid, the auto-baud routine synchronizes with the host via the serial
port (UART) or boots from the USB port (PIO0_3 is sampled HIGH).
If the UART is selected, the host should send a ’?’ (0x3F) as a synchronization character
and wait for a response. The host side serial port settings should be 8 data bits, 1 stop bit
and no parity. The auto-baud routine measures the bit time of the received
synchronization character in terms of its own frequency and programs the baud rate
generator of the serial port. It also sends an ASCII string ("Synchronized<CR><LF>") to
the host. In response to this host should send the same string
("Synchronized<CR><LF>"). The auto-baud routine looks at the received characters to
verify synchronization. If synchronization is verified then "OK<CR><LF>" string is sent to
the host. Host should respond by sending the crystal frequency (in kHz) at which the part
is running. For example, if the part is running at 10 MHz, the response from the host
should be "10000<CR><LF>". "OK<CR><LF>" string is sent to the host after receiving the
crystal frequency. If synchronization is not verified then the auto-baud routine waits again
for a synchronization character. For auto-baud to work correctly in case of user invoked
ISP, the CCLK frequency should be greater than or equal to 10 MHz. In UART ISP mode,
the LPC13xx is clocked by the IRC and the crystal frequency is ignored.
For more details on Reset, PLL and startup/boot code interaction see
Once the crystal frequency is received the part is initialized and the ISP command handler
is invoked. For safety reasons an "Unlock" command is required before executing the
commands resulting in flash erase/write operations and the "Go" command. The rest of
the commands can be executed without the unlock command. The Unlock command is
required to be executed once per ISP session. The Unlock command is explained in
Section 19.13 “ISP commands” on page
All ISP commands should be sent as single ASCII strings. Strings should be terminated
with Carriage Return (CR) and/or Line Feed (LF) control characters. Extra <CR> and
<LF> characters are ignored. All ISP responses are sent as <CR><LF> terminated ASCII
strings. Data is sent and received in UU-encoded format.
"Command Parameter_0 Parameter_1 ... Parameter_n<CR><LF>" "Data" (Data only for
Write commands).
"Return_Code<CR><LF>Response_0<CR><LF>Response_1<CR><LF> ...
Response_n<CR><LF>" "Data" (Data only for Read commands).
The data stream is in UU-encoded format. The UU-encode algorithm converts 3 bytes of
binary data in to 4 bytes of printable ASCII character set. It is more efficient than Hex
format which converts 1 byte of binary data in to 2 bytes of ASCII hex. The sender should
send the check-sum after transmitting 20 UU-encoded lines. The length of any
UU-encoded line should not exceed 61 characters (bytes) i.e. it can hold 45 data bytes.
All information provided in this document is subject to legal disclaimers.
Rev. 2 — 7 July 2010
Chapter 19: LPC13xx Flash memory programming firmware
300.
Section
UM10375
© NXP B.V. 2010. All rights reserved.
3.6.
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