LPC1313FBD48,151 NXP Semiconductors, LPC1313FBD48,151 Datasheet - Page 66

• Manufacturer Part Number: LPC1313FBD48,151
• Description: IC MCU 32BIT 32KB FLASH 48LQFP
• Manufacturer: NXP Semiconductors
• Series: LPC13xxr

Specifications of LPC1313FBD48,151

• Program Memory Type: FLASH
• Program Memory Size: 32KB (32K x 8)
• Package / Case: 48-LQFP
• Core Processor: ARM® Cortex-M3™
• Core Size: 32-Bit
• Speed: 72MHz
• Connectivity: I²C, Microwire, SPI, SSI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, WDT
• Number Of I /o: 42
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 3.6 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Processor Series: LPC13
• Core: ARM Cortex M3
• Data Bus Width: 32 bit
• Interface Type: I2C, UART
• Maximum Clock Frequency: 72 MHz
• Number Of Timers: 2
• Operating Supply Voltage: 3.3 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: MDK-ARM, RL-ARM, ULINK2
• Development Tools By Supplier: OM11041
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 8 Channel
• Cpu Family: LPC1000
• Device Core: ARM Cortex-M3
• Device Core Size: 32b
• Frequency (max): 72MHz
• Total Internal Ram Size: 8KB
• # I/os (max): 42
• Number Of Timers - General Purpose: 4
• Operating Supply Voltage (typ): 3.3V
• Operating Supply Voltage (max): 3.6V
• Operating Supply Voltage (min): 2V
• Instruction Set Architecture: RISC
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 48
• Package Type: LQFP
• Package: 48LQFP
• Family Name: LPC1000
• Maximum Speed: 72 MHz
• Number Of Programmable I/os: 42
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: 568-4918 - KIT DEV FOR LPC1313622-1005 - USB IN-CIRCUIT PROG ARM7 LPC2K
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 568-4914; 935289651151

NXP Semiconductors
UM10375
User manual
5.6.10 Interrupt Active Bit Register 1
The IABR1 register is a read-only register that allows reading the active state of the
second group of peripheral interrupts. This allows determining which peripherals are
asserting an interrupt to the NVIC, and may also be pending if there are enabled.
The bit description is as follows for all bits in this register:
Write — n/a.
Read — 0 indicates that the interrupt is not active, 1 indicates that the interrupt is active.
Table 72.
Bit
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
31:25 -
Name
IAB_PIO2_8
IAB_PIO2_9
IAB_PIO2_10
IAB_PIO2_11
IAB_PIO3_0
IAB_PIO3_1
IAB_PIO3_2
IAB_PIO3_3
IAB_I2C0
IAB_CT16B0
IAB_CT16B1
IAB_CT32B0
IAB_CT32B1
IAB_SSP
IAB_UART
IAB_USBIRQ
IAB_USBFRQ
IAB_ADC
IAB_WDT
IAB_BOD
-
IAB_PIO_3
IAB_PIO_2
IAB_PIO_1
IAB_PIO_0
Interrupt Active Bit Register 1 (IABR1 - address 0xE000 E304) bit description
All information provided in this document is subject to legal disclaimers.
Timer CT16B0 interrupt active.
Timer CT16B1 interrupt active.
Timer CT32B0 interrupt active.
Timer CT32B1 interrupt active.
Description
PIO0_0 start logic input interrupt active.
PIO2_9 start logic input interrupt active.
PIO2_10 start logic input interrupt active.
PIO2_11 start logic input interrupt active.
PIO3_0 start logic input interrupt active.
PIO3_0 start logic input interrupt active.
PIO3_0 start logic input interrupt active.
PIO3_0 start logic input interrupt active.
I
SSP interrupt active.
UART interrupt active.
USB IRQ interrupt active.
USB FRQ interrupt active.
ADC interrupt active.
WDT interrupt active.
BOD interrupt active.
Reserved, user software should not write ones to reserved bits. The
value read from a reserved bit is not defined.
GPIO port 3 interrupt active.
GPIO port 2 interrupt active.
GPIO port 1 interrupt active.
GPIO port 0 interrupt active.
Reserved, user software should not write ones to reserved bits. The
value read from a reserved bit is not defined.
2
C0 interrupt active.
Rev. 2 — 7 July 2010
Chapter 5: LPC13xx Interrupt controller
UM10375
© NXP B.V. 2010. All rights reserved.
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