MC68331CEH25 Freescale Semiconductor, MC68331CEH25 Datasheet - Page 67

• Manufacturer Part Number: MC68331CEH25
• Description: IC MCU 32BIT 25MHZ 132-PQFP
• Manufacturer: Freescale Semiconductor
• Series: M683xxr

Specifications of MC68331CEH25

• Core Processor: CPU32
• Core Size: 32-Bit
• Speed: 25MHz
• Connectivity: EBI/EMI, SCI, SPI, UART/USART
• Peripherals: POR, PWM, WDT
• Number Of I /o: 18
• Program Memory Type: ROMless
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 132-QFP
• Controller Family/series: 68K
• No. Of I/o's: 18
• Cpu Speed: 25MHz
• No. Of Timers: 1
• Embedded Interface Type: QSPI, SCI, UART
• No. Of Pwm Channels: 2
• Digital Ic Case Style: PQFP
• Rohs Compliant: Yes
• Processor Series: M683xx
• Core: CPU32
• Data Bus Width: 32 bit
• Data Ram Size: 80 B
• Interface Type: QSPI, SCI, UART
• Maximum Clock Frequency: 25 MHz
• Number Of Programmable I/os: 18
• Number Of Timers: 1
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• Eeprom Size: -
• Ram Size: -
• Program Memory Size: -
• Data Converters: -
• Lead Free Status / Rohs Status: Details

4.5.2.2 Write Cycle
4.5.3 Fast Termination Cycles
MC68331
USER’S MANUAL
During a write cycle, the MCU transfers data to an external memory or peripheral de-
vice. If the instruction specifies a long-word or word operation, the MCU attempts to
write two bytes at once. For a byte operation, the MCU writes one byte. The portion of
the data bus upon which each byte is written depends on operand size, peripheral ad-
dress, and peripheral port size.
Refer to 4.4.2 Dynamic Bus Sizing and 4.4.4 Misaligned Operands for more infor-
mation. Figure 4-10 is a flowchart of a write-cycle operation for a word transfer. Refer
to the SIM Reference Manual (SIMRM/AD) for more information.
When an external device has a fast access time, the chip-select circuit fast-termination
option can provide a two-cycle external bus transfer. Because the chip-select circuits
2) DRIVE ADDRESS ON ADDR[23:0]
3) DRIVE FUNCTION CODE ON FC[2:0]
4) DRIVE SIZ[1:0] FOR OPERAND SIZE
1) NEGATE DS AND AS
2) REMOVE DATA FROM DATA BUS
1) SET R/W TO WRITE
ASSERT DS AND WAIT FOR DSACK (S3)
TERMINATE OUTPUT TRANSFER (S5)
PLACE DATA ON DATA[15:0] (S2)
ADDRESS DEVICE (S0)
OPTIONAL STATE (S4)
START NEXT CYCLE
ASSERT AS (S1)
NO CHANGE
MCU
Freescale Semiconductor, Inc.
For More Information On This Product,
Figure 4-10 Write Cycle Flowchart
SYSTEM INTEGRATION MODULE
Go to: www.freescale.com
1) DECODE ADDRESS
2) LATCH DATA FROM DATA BUS
3) ASSERT DSACK SIGNALS
1) NEGATE DSACK
ACCEPT DATA (S2 + S3)
TERMINATE CYCLE
PERIPHERAL
WR CYC FLOW
4-25
4