MC68331CEH25 Freescale Semiconductor, MC68331CEH25 Datasheet - Page 214

• Manufacturer Part Number: MC68331CEH25
• Description: IC MCU 32BIT 25MHZ 132-PQFP
• Manufacturer: Freescale Semiconductor
• Series: M683xxr

Specifications of MC68331CEH25

• Core Processor: CPU32
• Core Size: 32-Bit
• Speed: 25MHz
• Connectivity: EBI/EMI, SCI, SPI, UART/USART
• Peripherals: POR, PWM, WDT
• Number Of I /o: 18
• Program Memory Type: ROMless
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 132-QFP
• Controller Family/series: 68K
• No. Of I/o's: 18
• Cpu Speed: 25MHz
• No. Of Timers: 1
• Embedded Interface Type: QSPI, SCI, UART
• No. Of Pwm Channels: 2
• Digital Ic Case Style: PQFP
• Rohs Compliant: Yes
• Processor Series: M683xx
• Core: CPU32
• Data Bus Width: 32 bit
• Data Ram Size: 80 B
• Interface Type: QSPI, SCI, UART
• Maximum Clock Frequency: 25 MHz
• Number Of Programmable I/os: 18
• Number Of Timers: 1
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• Eeprom Size: -
• Ram Size: -
• Program Memory Size: -
• Data Converters: -
• Lead Free Status / Rohs Status: Details

D
D.2.4 DDRGP — Port GP Data Direction Register
DDRGP[7:0] — Parallel Data Direction Register
PORTGP[7:0] — Parallel Data Register
D.2.5 OC1M— OC1 Action Mask Register
OC1M[5:1] — OC1 Mask
OC1D[5:1] — OC1 Data
D.2.6 TCNT — Timer Counter Register
D-6
15
15
0
0
When GPT pins are used as an 8-bit port, DDRGP determines whether pins are input
or output and PORTGP holds the 8-bit data.
All OC outputs can be controlled by the action of OC1. OC1M contains a mask that
determines which pins are affected. OC1D determines what outputs are affected.
OC1M[5:1] correspond to OC[5:1].
OC1D[5:1] correspond to OC[5:1].
TCNT is the 16-bit free-running counter associated with the input capture, output com-
pare, and pulse accumulator functions of the GPT module.
RESET:
RESET:
PORTGP — Port GP Data Register
0 = Input only
1 = Output
OC1D — OC1 Action Data Register
0 = Corresponding output compare pin is not affected by OC1 compare.
1 = Corresponding output compare pin is affected by OC1 compare.
0 =If OC1 mask bit is set, clear corresponding output compare pin on OC1 match.
1 =If OC1 mask bit is set, set corresponding output compare pin on OC1 match.
0
0
OC1M
0
0
0
0
DDRGP
Freescale Semiconductor, Inc.
11
For More Information On This Product,
0
0
10
0
0
0
Go to: www.freescale.com
REGISTER SUMMARY
0
9
0
0
8
0
8
0
0
7
0
7
0
0
0
OC1D
0
0
0
0
PORTGP
0
3
0
USER’S MANUAL
0
2
0
0
$YFF90A
$YFF906
$YFF907
$YFF908
$YFF909
0
1
0
0
MC68331
0
0
0
0
0