MC68331CEH25 Freescale Semiconductor, MC68331CEH25 Datasheet - Page 40

• Manufacturer Part Number: MC68331CEH25
• Description: IC MCU 32BIT 25MHZ 132-PQFP
• Manufacturer: Freescale Semiconductor
• Series: M683xxr

Specifications of MC68331CEH25

• Core Processor: CPU32
• Core Size: 32-Bit
• Speed: 25MHz
• Connectivity: EBI/EMI, SCI, SPI, UART/USART
• Peripherals: POR, PWM, WDT
• Number Of I /o: 18
• Program Memory Type: ROMless
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 132-QFP
• Controller Family/series: 68K
• No. Of I/o's: 18
• Cpu Speed: 25MHz
• No. Of Timers: 1
• Embedded Interface Type: QSPI, SCI, UART
• No. Of Pwm Channels: 2
• Digital Ic Case Style: PQFP
• Rohs Compliant: Yes
• Processor Series: M683xx
• Core: CPU32
• Data Bus Width: 32 bit
• Data Ram Size: 80 B
• Interface Type: QSPI, SCI, UART
• Maximum Clock Frequency: 25 MHz
• Number Of Programmable I/os: 18
• Number Of Timers: 1
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• Eeprom Size: -
• Ram Size: -
• Program Memory Size: -
• Data Converters: -
• Lead Free Status / Rohs Status: Details

3
3.7 System Reset
3.7.1 SIM Reset Mode Selection
3-16
The following information is a concise reference only. System reset is a complex op-
eration. To understand operation during and after reset, refer to SECTION 4 SYSTEM
INTEGRATION MODULE, paragraph 4.6 Reset for a more complete discussion of the
reset function.
The logic states of certain data bus pins during reset determine SIM operating config-
uration. In addition, the state of the MODCLK pin determines system clock source and
the state of the BKPT pin determines what happens during subsequent breakpoint as-
sertions. Table 3-6 is a summary of reset mode selection options.
Mode Select Pin
MODCLK
DATA11
DATA0
DATA1
DATA2
DATA3
DATA4
DATA5
DATA6
DATA7
DATA8
DATA9
BKPT
Freescale Semiconductor, Inc.
Table 3-6 SIM Reset Mode Selection
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Background Mode Disabled
VCO = System Clock
DSACK0, DSACK1,
Test Mode Disabled
IRQ[7:1], MODCLK
Default Function
CSBOOT 16-Bit
(Pin Left High)
AVEC, DS, AS,
OVERVIEW
CS[10:6]
SIZ[1:0]
CS[7:6]
CS[8:6]
CS[9:6]
CS0
CS1
CS2
CS3
CS4
CS5
CS6
Background Mode Enabled
EXTAL = System Clock
Alternate Function
Test Mode Enabled
(Pin Pulled Low)
CSBOOT 8-Bit
ADDR[20:19]
ADDR[21:19]
ADDR[22:19]
ADDR[23:19]
FC0FC1FC2
ADDR19
BGACK
PORTE
PORTF
BRBG
USER’S MANUAL
MC68331