MC68331CEH25 Freescale Semiconductor, MC68331CEH25 Datasheet - Page 102

IC MCU 32BIT 25MHZ 132-PQFP

MC68331CEH25

Manufacturer Part Number
MC68331CEH25
Description
IC MCU 32BIT 25MHZ 132-PQFP
Manufacturer
Freescale Semiconductor
Series
M683xxr
Datasheets

Specifications of MC68331CEH25

Core Processor
CPU32
Core Size
32-Bit
Speed
25MHz
Connectivity
EBI/EMI, SCI, SPI, UART/USART
Peripherals
POR, PWM, WDT
Number Of I /o
18
Program Memory Type
ROMless
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
132-QFP
Controller Family/series
68K
No. Of I/o's
18
Cpu Speed
25MHz
No. Of Timers
1
Embedded Interface Type
QSPI, SCI, UART
No. Of Pwm Channels
2
Digital Ic Case Style
PQFP
Rohs Compliant
Yes
Processor Series
M683xx
Core
CPU32
Data Bus Width
32 bit
Data Ram Size
80 B
Interface Type
QSPI, SCI, UART
Maximum Clock Frequency
25 MHz
Number Of Programmable I/os
18
Number Of Timers
1
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
Eeprom Size
-
Ram Size
-
Program Memory Size
-
Data Converters
-
Lead Free Status / Rohs Status
 Details

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Part Number
Manufacturer
Quantity
Price
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Manufacturer:
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5
5.2 CPU32 Registers
5-2
The CPU32 programming model consists of two groups of registers that correspond
to the user and supervisor privilege levels. User programs can use only the registers
of the user model. The supervisor programming model, which supplements the user
programming model, is used by CPU32 system programmers who wish to protect sen-
sitive operating system functions. The supervisor model is identical to that of the
MC68010 and later processors.
The CPU32 has eight 32-bit data registers, seven 32-bit address registers, a 32-bit
program counter, separate 32-bit supervisor and user stack pointers, a 16-bit status
register, two alternate function code registers, and a 32-bit vector base register (see
Figure 5-2 and Figure 5-3).
MICROSEQUENCER AND CONTROL
CONTROL STORE
CONTROL LOGIC
Freescale Semiconductor, Inc.
ADDRESS
For More Information On This Product,
Figure 5-1 CPU32 Block Diagram
BUS
CENTRAL PROCESSING UNIT
Go to: www.freescale.com
WRITE PENDING
STAGE
C
PROGRAM
COUNTER
SECTION
BUFFER
DECODE
INSTRUCTION PIPELINE
EXECUTION UNIT
BUS CONTROL
CONTROLLER
MICROBUS
SIGNALS
STAGE
B
CONTROLLER
PREFETCH
SECTION
DATA
BUFFER
STAGE
A
USER’S MANUAL
DATA
BUS
MC68331
1127A

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