MC68331CEH25 Freescale Semiconductor, MC68331CEH25 Datasheet - Page 235

IC MCU 32BIT 25MHZ 132-PQFP

MC68331CEH25

Manufacturer Part Number
MC68331CEH25
Description
IC MCU 32BIT 25MHZ 132-PQFP
Manufacturer
Freescale Semiconductor
Series
M683xxr
Datasheets

Specifications of MC68331CEH25

Core Processor
CPU32
Core Size
32-Bit
Speed
25MHz
Connectivity
EBI/EMI, SCI, SPI, UART/USART
Peripherals
POR, PWM, WDT
Number Of I /o
18
Program Memory Type
ROMless
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
132-QFP
Controller Family/series
68K
No. Of I/o's
18
Cpu Speed
25MHz
No. Of Timers
1
Embedded Interface Type
QSPI, SCI, UART
No. Of Pwm Channels
2
Digital Ic Case Style
PQFP
Rohs Compliant
Yes
Processor Series
M683xx
Core
CPU32
Data Bus Width
32 bit
Data Ram Size
80 B
Interface Type
QSPI, SCI, UART
Maximum Clock Frequency
25 MHz
Number Of Programmable I/os
18
Number Of Timers
1
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
Eeprom Size
-
Ram Size
-
Program Memory Size
-
Data Converters
-
Lead Free Status / Rohs Status
 Details

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INTV[7:0] — Interrupt Vector Number
D.4.4 SCCR0 — SCI Control Register 0
SCBR — SCI Baud Rate
D.4.5 SCCR1 — SCI Control Register 1
LOOPS — Loop Mode
WOMS — Wired-OR Mode for SCI Pins
ILT — Idle-Line Detect Type
MC68331
USER’S MANUAL
15
15
0
0
0
0
The values of INTV[7:1] are the same for both QSPI and SCI interrupt requests; the
value of INTV0 used during an interrupt acknowledge cycle is supplied by the QSM.
INTV0 is at logic level zero during an SCI interrupt and at logic level one during a QSPI
interrupt. A write to INTV0 has no effect. Reads of INTV0 return a value of one.
SCCR0 contains the SCI baud rate selection field. Baud rate must be set before the
SCI is enabled. The CPU32 can read and write SCCR0 at any time. Changing the val-
ue of SCCR0 bits during a transfer operation can disrupt operation.
SCI baud rate is programmed by writing a 13-bit value to this field. Writing a value of
zero to SCBR disables the baud rate generator. Baud clock rate is calculated as fol-
lows:
SCCR1 contains SCI configuration parameters, including transmitter and receiver en-
able bits, interrupt enable bits, and operating mode enable bits. The CPU can read and
write SCCR0 at any time. The SCI can modify the RWU bit under certain circumstanc-
es. Changing the value of SCCR1 bits during a transfer operation can disrupt opera-
tion.
RESET:
RESET:
0 = Normal SCI operation, no looping, feedback path disabled
1 = Test SCI operation, looping, feedback path enabled
0 = If configured as an output, TXD is a normal CMOS output.
1 = If configured as an output, TXD is an open-drain output.
0 = Short idle-line detect (start count on first one)
1 = Long idle-line detect (start count on first one after stop bit(s))
LOOPS
14
0
0
14
0
13
0
0
WOMS
13
0
12
0
ILT
12
0
Freescale Semiconductor, Inc.
For More Information On This Product,
0
PT
11
0
0
PE
10
0
Go to: www.freescale.com
REGISTER SUMMARY
M
9
0
0
WAKE
8
0
0
TIE
0
7
0
SCBR
TCIE
0
6
0
RIE
0
5
0
ILIE
0
4
0
TE
0
3
0
RE
1
2
0
$YFFC0A
$YFFC08
RWU
0
1
0
D-27
SBK
0
0
0
0
D

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