MC68331CEH25 Freescale Semiconductor, MC68331CEH25 Datasheet - Page 115

• Manufacturer Part Number: MC68331CEH25
• Description: IC MCU 32BIT 25MHZ 132-PQFP
• Manufacturer: Freescale Semiconductor
• Series: M683xxr

Specifications of MC68331CEH25

• Core Processor: CPU32
• Core Size: 32-Bit
• Speed: 25MHz
• Connectivity: EBI/EMI, SCI, SPI, UART/USART
• Peripherals: POR, PWM, WDT
• Number Of I /o: 18
• Program Memory Type: ROMless
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 132-QFP
• Controller Family/series: 68K
• No. Of I/o's: 18
• Cpu Speed: 25MHz
• No. Of Timers: 1
• Embedded Interface Type: QSPI, SCI, UART
• No. Of Pwm Channels: 2
• Digital Ic Case Style: PQFP
• Rohs Compliant: Yes
• Processor Series: M683xx
• Core: CPU32
• Data Bus Width: 32 bit
• Data Ram Size: 80 B
• Interface Type: QSPI, SCI, UART
• Maximum Clock Frequency: 25 MHz
• Number Of Programmable I/os: 18
• Number Of Timers: 1
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• Eeprom Size: -
• Ram Size: -
• Program Memory Size: -
• Data Converters: -
• Lead Free Status / Rohs Status: Details

5.9.1 Exception Vectors
MC68331
USER’S MANUAL
An exception vector is the address of a routine that handles an exception. The vector
base register (VBR) contains the base address of a 1024-byte exception vector table,
which consists of 256 exception vectors. Sixty-four vectors are defined by the proces-
sor, and 192 vectors are reserved for user definition as interrupt vectors. Except for
the reset vector, each vector in the table is one long word in length. The reset vector
is two long words in length. Refer to Table 5-2 for information on vector assignment.
All exception vectors, except the reset vector, are located in supervisor data space.
The reset vector is located in supervisor program space. Only the initial reset vector is
fixed in the processor memory map. When initialization is complete, there are no fixed
assignments. Since the VBR stores the vector table base address, the table can be
located anywhere in memory. It can also be dynamically relocated for each task exe-
cuted by an operating system.
Because there is no protection on the 64 processor-defined vectors,
external devices can access vectors reserved for internal purposes.
This practice is strongly discouraged.
Freescale Semiconductor, Inc.
For More Information On This Product,
CENTRAL PROCESSING UNIT
Go to: www.freescale.com
CAUTION
5-15
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