MC68331CEH25 Freescale Semiconductor, MC68331CEH25 Datasheet - Page 167

• Manufacturer Part Number: MC68331CEH25
• Description: IC MCU 32BIT 25MHZ 132-PQFP
• Manufacturer: Freescale Semiconductor
• Series: M683xxr

Specifications of MC68331CEH25

• Core Processor: CPU32
• Core Size: 32-Bit
• Speed: 25MHz
• Connectivity: EBI/EMI, SCI, SPI, UART/USART
• Peripherals: POR, PWM, WDT
• Number Of I /o: 18
• Program Memory Type: ROMless
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 132-QFP
• Controller Family/series: 68K
• No. Of I/o's: 18
• Cpu Speed: 25MHz
• No. Of Timers: 1
• Embedded Interface Type: QSPI, SCI, UART
• No. Of Pwm Channels: 2
• Digital Ic Case Style: PQFP
• Rohs Compliant: Yes
• Processor Series: M683xx
• Core: CPU32
• Data Bus Width: 32 bit
• Data Ram Size: 80 B
• Interface Type: QSPI, SCI, UART
• Maximum Clock Frequency: 25 MHz
• Number Of Programmable I/os: 18
• Number Of Timers: 1
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• Eeprom Size: -
• Ram Size: -
• Program Memory Size: -
• Data Converters: -
• Lead Free Status / Rohs Status: Details

7.8 Capture/Compare Unit
MC68331
USER’S MANUAL
Multiplexer outputs (including the PCLK signal) can be connected to external pins) can
be connected to external pins. The CPROUT bit in the TMSK2 register configures the
OC1 pin to output the TCNT clock and the PPROUT bit in the PWMC register config-
ures the PWMA pin to output the PWMC clock. CPROUT and PPROUT can be written
at any time. Clock signals on OC1 and PWMA do not have a 50% duty cycle. They
have the period of the selected clock but are high for only one system clock time.
The prescaler also supplies three clock signals to the pulse accumulator clock select
mux. These are the system clock divided by 512, the external clock signal from the
PCLK pin and the capture/compare clock signal.
The capture/compare unit contains the timer counter (TCNT), the input capture (IC)
functions and the output compare (OC) functions. Figure 7-3 is a block diagram of the
capture/compare unit.
PCLK
PIN
SYSTEM CLOCK
DIVIDER
Freescale Semiconductor, Inc.
SYNCHRONIZER AND
Figure 7-2 Prescaler Block Diagram
DIGITAL FILTER
For More Information On This Product,
GENERAL-PURPOSE TIMER
Go to: www.freescale.com
EXT.
EXT.
256
128
128
64
64
32
16
32
16
4
4
8
8
2
CPR2 CPR1 CPR0
PPR2 PPR1 PPR0
EXT.
512
SELECT
SELECT
TO PULSE ACCUMULATOR
TO PULSE ACCUMULATOR
TO PULSE ACCUMULATOR
TO CAPTURE/
GPT PRESCALER BLOCK
PWM UNIT
COMPARE
TIMER
TO
7-9
7