MC68331CEH25 Freescale Semiconductor, MC68331CEH25 Datasheet - Page 4

• Manufacturer Part Number: MC68331CEH25
• Description: IC MCU 32BIT 25MHZ 132-PQFP
• Manufacturer: Freescale Semiconductor
• Series: M683xxr

Specifications of MC68331CEH25

• Core Processor: CPU32
• Core Size: 32-Bit
• Speed: 25MHz
• Connectivity: EBI/EMI, SCI, SPI, UART/USART
• Peripherals: POR, PWM, WDT
• Number Of I /o: 18
• Program Memory Type: ROMless
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 132-QFP
• Controller Family/series: 68K
• No. Of I/o's: 18
• Cpu Speed: 25MHz
• No. Of Timers: 1
• Embedded Interface Type: QSPI, SCI, UART
• No. Of Pwm Channels: 2
• Digital Ic Case Style: PQFP
• Rohs Compliant: Yes
• Processor Series: M683xx
• Core: CPU32
• Data Bus Width: 32 bit
• Data Ram Size: 80 B
• Interface Type: QSPI, SCI, UART
• Maximum Clock Frequency: 25 MHz
• Number Of Programmable I/os: 18
• Number Of Timers: 1
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• Eeprom Size: -
• Ram Size: -
• Program Memory Size: -
• Data Converters: -
• Lead Free Status / Rohs Status: Details

Paragraph
4.2.11
4.2.12
4.2.13
4.3
4.3.1
4.3.2
4.3.3
4.3.4
4.3.5
4.4
4.4.1
4.4.1.1
4.4.1.2
4.4.1.3
4.4.1.4
4.4.1.5
4.4.1.6
4.4.1.7
4.4.1.8
4.4.1.9
4.4.1.10
4.4.1.11
4.4.2
4.4.3
4.4.4
4.4.5
4.5
4.5.1
4.5.2
4.5.2.1
4.5.2.2
4.5.3
4.5.4
4.5.4.1
4.5.4.2
4.5.5
4.5.5.1
4.5.5.2
4.5.5.3
4.5.5.4
4.5.6
System Clock ................................................................................................. 4-9
External Bus Interface .................................................................................. 4-17
Bus Operation .............................................................................................. 4-22
Periodic Interrupt Timer .......................................................................... 4-7
Low-Power STOP Operation .................................................................. 4-8
Freeze Operation ................................................................................... 4-9
Clock Sources ...................................................................................... 4-10
Clock Synthesizer Operation ................................................................ 4-10
External Bus Clock ............................................................................... 4-15
Low-Power Operation ........................................................................... 4-15
Loss of Reference Signal ..................................................................... 4-16
Bus Signals .......................................................................................... 4-18
Dynamic Bus Sizing ............................................................................. 4-20
Operand Alignment .............................................................................. 4-21
Misaligned Operands ........................................................................... 4-21
Operand Transfer Cases ...................................................................... 4-22
Synchronization to CLKOUT ................................................................ 4-23
Regular Bus Cycles .............................................................................. 4-23
Fast Termination Cycles ....................................................................... 4-25
CPU Space Cycles ............................................................................... 4-26
Bus Exception Control Cycles .............................................................. 4-30
External Bus Arbitration ........................................................................ 4-34
Address Bus ................................................................................. 4-18
Address Strobe ............................................................................ 4-18
Data Bus ...................................................................................... 4-18
Data Strobe .................................................................................. 4-18
Read/Write Signal ........................................................................ 4-18
Size Signals ................................................................................. 4-18
Function Codes ............................................................................ 4-19
Data and Size Acknowledge Signals ........................................... 4-19
Bus Error Signal ........................................................................... 4-19
Halt Signal .................................................................................... 4-20
Autovector Signal ......................................................................... 4-20
Read Cycle ................................................................................... 4-24
Write Cycle ................................................................................... 4-25
Breakpoint Acknowledge Cycle .................................................... 4-27
LPSTOP Broadcast Cycle ............................................................ 4-30
Bus Errors .................................................................................... 4-32
Double Bus Faults ........................................................................ 4-32
Retry Operation ............................................................................ 4-33
Halt Operation .............................................................................. 4-33
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USER’S MANUAL
MC68331
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