MC68331CEH25 Freescale Semiconductor, MC68331CEH25 Datasheet - Page 152

• Manufacturer Part Number: MC68331CEH25
• Description: IC MCU 32BIT 25MHZ 132-PQFP
• Manufacturer: Freescale Semiconductor
• Series: M683xxr

Specifications of MC68331CEH25

• Core Processor: CPU32
• Core Size: 32-Bit
• Speed: 25MHz
• Connectivity: EBI/EMI, SCI, SPI, UART/USART
• Peripherals: POR, PWM, WDT
• Number Of I /o: 18
• Program Memory Type: ROMless
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 132-QFP
• Controller Family/series: 68K
• No. Of I/o's: 18
• Cpu Speed: 25MHz
• No. Of Timers: 1
• Embedded Interface Type: QSPI, SCI, UART
• No. Of Pwm Channels: 2
• Digital Ic Case Style: PQFP
• Rohs Compliant: Yes
• Processor Series: M683xx
• Core: CPU32
• Data Bus Width: 32 bit
• Data Ram Size: 80 B
• Interface Type: QSPI, SCI, UART
• Maximum Clock Frequency: 25 MHz
• Number Of Programmable I/os: 18
• Number Of Timers: 1
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• Eeprom Size: -
• Ram Size: -
• Program Memory Size: -
• Data Converters: -
• Lead Free Status / Rohs Status: Details

6
6.4.3.1 Definition of Terms
6.4.3.2 Serial Formats
6.4.3.3 Baud Clock
6-26
Bit-Time — The time required to transmit or receive one bit of data; one cycle of the
baud frequency.
Start Bit — One bit-time of logic zero that indicates the beginning of a data frame. A
start bit must begin with a one-to-zero transition and be preceded by at least three re-
ceive time (RT) samples of logic one.
Stop Bit — One bit-time of logic one that indicates the end of a data frame.
Frame — A complete unit of serial information. The SCI can use 10-bit or 11-bit
frames.
Data Frame — A start bit, a specified number of data or information bits, and at least
one stop bit.
Idle Frame — A frame that consists of consecutive ones. An idle frame has no start bit.
Break Frame — A frame that consists of consecutive zeros. A break frame has no stop
bits.
All data frames must have a start bit and at least one stop bit. Receiving and transmit-
ting devices must use the same data frame format. The SCI provides hardware sup-
port for both ten-bit and eleven-bit frames. The serial mode (M) bit in SCI control
register one (SCCR1) specifies the number of bits per frame.
The most common ten-bit data frame format for NRZ serial interface consists of one
start bit, eight data bits (LSB first), and one stop bit. The most common eleven-bit data
frame contains one start bit, eight data bits, a parity or control bit, and one stop bit.
Ten-bit and eleven-bit frames are shown in Table 6-5.
The SCI baud clock is programmed by writing a 13-bit value to the baud rate (SCBR)
field in SCI control register zero (SCCR0). Baud clock is derived from the MCU system
clock by a modulus counter. Writing a value of zero to SCBR disables the baud rate
generator. Baud clock rate is calculated as follows:
Start
Start
1
1
1
1
1
Freescale Semiconductor, Inc.
For More Information On This Product,
Table 6-5 Serial Frame Formats
Data
Data
QUEUED SERIAL MODULE
7
7
8
7
8
Go to: www.freescale.com
10-Bit Frames
11-Bit Frames
Parity/Control
Parity/Control
—
—
1
1
1
USER’S MANUAL
Stop
Stop
2
1
1
2
1
MC68331