MC68331CEH25 Freescale Semiconductor, MC68331CEH25 Datasheet - Page 212

• Manufacturer Part Number: MC68331CEH25
• Description: IC MCU 32BIT 25MHZ 132-PQFP
• Manufacturer: Freescale Semiconductor
• Series: M683xxr

Specifications of MC68331CEH25

• Core Processor: CPU32
• Core Size: 32-Bit
• Speed: 25MHz
• Connectivity: EBI/EMI, SCI, SPI, UART/USART
• Peripherals: POR, PWM, WDT
• Number Of I /o: 18
• Program Memory Type: ROMless
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 132-QFP
• Controller Family/series: 68K
• No. Of I/o's: 18
• Cpu Speed: 25MHz
• No. Of Timers: 1
• Embedded Interface Type: QSPI, SCI, UART
• No. Of Pwm Channels: 2
• Digital Ic Case Style: PQFP
• Rohs Compliant: Yes
• Processor Series: M683xx
• Core: CPU32
• Data Bus Width: 32 bit
• Data Ram Size: 80 B
• Interface Type: QSPI, SCI, UART
• Maximum Clock Frequency: 25 MHz
• Number Of Programmable I/os: 18
• Number Of Timers: 1
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• Eeprom Size: -
• Ram Size: -
• Program Memory Size: -
• Data Converters: -
• Lead Free Status / Rohs Status: Details

D
D.2 General-Purpose Timer
D.2.1 GPTMCR — GPT Module Configuration Register
STOP — Stop Clocks
D-4
RESET:
STOP
15
0
Table D-2 displays the GPT address map. The column labeled “Access” indicates the
privilege level at which the CPU must be operating to access the register. A designa-
tion of “S” indicates that supervisor access is required: a designation of “S/U” indicates
that the register can be programmed to the desired privilege level.
GPTMCR bits control freeze, low-power stop, and single-step modes.
Y = M111, where M is the logic state of the module mapping (MM) bit in the SIMCR.
0 = Internal clocks not shut down
1 = Internal clocks shut down
FRZ1
Access
14
0
S/U
S/U
S/U
S/U
S/U
S/U
S/U
S/U
S/U
S/U
S/U
S/U
S/U
S/U
S/U
S/U
S/U
S/U
S/U
S/U
S
S
S
FRZ0
13
0
$YFF92E –
$YFF90A
$YFF90C
$YFF90E
$YFF91A
$YFF91C
$YFF91E
$YFF92A
$YFF92C
$YFF900
$YFF902
$YFF904
$YFF906
$YFF908
$YFF910
$YFF912
$YFF914
$YFF916
$YFF918
$YFF920
$YFF922
$YFF924
$YFF926
$YFF928
$YFF93F
STOPP
Address
12
0
Freescale Semiconductor, Inc.
For More Information On This Product,
INCP
11
0
15
PGP DATA DIRECTION (DDRGP)
Table D-2 GPT Address Map
PWMA BUFFER (PWMBUFA)
FORCE COMPARE (CFORC)
OC1 ACTION MASK (OC1M)
TIMER CONTROL 1 (TCTL1)
PWM CONTROL A (PWMA)
TIMER MASK 1 (TMSK1)
10
TIMER FLAG 1 (TFLG1)
0
0
PA CONTROL (PACTL)
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REGISTER SUMMARY
INPUT CAPTURE 4/OUTPUT COMPARE 5 (TI4/O5)
GPT MODULE CONFIGURATION (GPTMCR)
9
0
0
INTERRUPT CONFIGURATION (ICR)
OUTPUT COMPARE 1 (TOC1)
OUTPUT COMPARE 2 (TOC2)
OUTPUT COMPARE 3 (TOC3)
OUTPUT COMPARE 4 (TOC4)
8
0
0
GPT PRESCALER (PRESCL)
INPUT CAPTURE 1 (TIC1)
INPUT CAPTURE 2 (TIC2)
INPUT CAPTURE 3 (TIC3)
TIMER COUNTER (TCNT)
PWM COUNT (PWMCNT)
(RESERVED FOR TEST)
SUPV
7
1
NOT USED
8 7
6
0
0
PWMB BUFFER (PWMBUFB)
TIMER CONTROL 2 (TCTL2)
OC1 ACTION DATA (OC1D)
PWM CONTROL C (PWMC)
PWM CONTROL B (PWMB)
TIMER MASK 2 (TMSK2)
PA COUNTER (PACNT)
TIMER FLAG 2 (TFLG2)
5
0
0
PGP DATA (PORTGP)
4
0
0
3
0
USER’S MANUAL
0
IARB
$YFF900
0
MC68331
0
0
0