MC68331CEH25 Freescale Semiconductor, MC68331CEH25 Datasheet - Page 107

IC MCU 32BIT 25MHZ 132-PQFP

MC68331CEH25

Manufacturer Part Number
MC68331CEH25
Description
IC MCU 32BIT 25MHZ 132-PQFP
Manufacturer
Freescale Semiconductor
Series
M683xxr
Datasheets

Specifications of MC68331CEH25

Core Processor
CPU32
Core Size
32-Bit
Speed
25MHz
Connectivity
EBI/EMI, SCI, SPI, UART/USART
Peripherals
POR, PWM, WDT
Number Of I /o
18
Program Memory Type
ROMless
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
132-QFP
Controller Family/series
68K
No. Of I/o's
18
Cpu Speed
25MHz
No. Of Timers
1
Embedded Interface Type
QSPI, SCI, UART
No. Of Pwm Channels
2
Digital Ic Case Style
PQFP
Rohs Compliant
Yes
Processor Series
M683xx
Core
CPU32
Data Bus Width
32 bit
Data Ram Size
80 B
Interface Type
QSPI, SCI, UART
Maximum Clock Frequency
25 MHz
Number Of Programmable I/os
18
Number Of Timers
1
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
Eeprom Size
-
Ram Size
-
Program Memory Size
-
Data Converters
-
Lead Free Status / Rohs Status
 Details

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5.2.5 Vector Base Register (VBR)
5.3 Memory Organization
MC68331
USER’S MANUAL
The VBR contains the base address of the 1024-byte exception vector table, consist-
ing of 256 exception vectors. Exception vectors contain the memory addresses of rou-
tines that begin execution at the completion of exception processing. Refer to 5.9
Exception Processing for more information on the VBR and exception processing.
Memory is organized on a byte-addressable basis in which lower addresses corre-
spond to higher order bytes. For example, the address N of a long-word data item cor-
responds to the address of the most significant byte of the highest order word. The
address of the most significant byte of the low-order word is N + 2, and the address of
the least significant byte of the long word is N + 3. The CPU32 requires long-word and
word data and instructions to be aligned on word boundaries (refer to Figure 5-6).
Data misalignment is not supported.
Freescale Semiconductor, Inc.
For More Information On This Product,
CENTRAL PROCESSING UNIT
Go to: www.freescale.com
5-7
5

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