MC68302EH16C Freescale Semiconductor, MC68302EH16C Datasheet - Page 99

• Manufacturer Part Number: MC68302EH16C
• Description: IC MPU MULTI-PROTOCOL 132-PQFP
• Manufacturer: Freescale Semiconductor

Specifications of MC68302EH16C

• Processor Type: M683xx 32-Bit
• Speed: 16MHz
• Voltage: 5V
• Mounting Type: Surface Mount
• Package / Case: 132-MQFP, 132-PQFP
• Controller Family/series: 68K
• Core Size: 32 Bit
• Ram Memory Size: 1152Byte
• Cpu Speed: 16MHz
• No. Of Timers: 3
• Embedded Interface Type: SCP, TDM
• Digital Ic Case Style: PQFP
• Rohs Compliant: Yes
• Family Name: M68000
• Device Core: ColdFire
• Device Core Size: 32b
• Frequency (max): 16MHz
• Instruction Set Architecture: RISC
• Supply Voltage 1 (typ): 5V
• Operating Temp Range: 0C to 70C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 132
• Package Type: PQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Features: -
• Lead Free Status / Rohs Status: RoHS Compliant part Electrostatic Device

3.7 ON-CHIP CLOCK GENERATOR
The IMP has an on-chip clock generator that supplies clocks to both the internal M68000
core and peripherals and to an external pin. The clock circuitry uses three dedicated pins:
EXTAL, XTAL, and CLKO.
The external clock/crystal (EXTAL) input provides two clock generation options. EXTAL may
be used to interface the internal generator to an external crystal (see Figure 3-10). Typical
circuit parameters are C1 = C2 = 25 pF and R = 700 k
Typical crystal parameters are Co < 10 pF and Rx = 50 . The equivalent load capacitance
(C L ) of this circuit is 20 pF, calculated as (C1 + C in )/2, where C1 = C2 = 25 pF and C in = 15
pF maximum on the EXTAL pin.
MOTOROLA
1. Calculate what the mask should be. For a 1 Megabyte block, the address lines A0
2. Write $3E00 to OR2 (DTACK=1 for 1 wait state, M23-M20 = 1 to use these bits in the
3. Write $0401 to BR2 (FC2-FC0 = 0 don’t care, A23-A13 = base address, RW = 0 don’t
through A19 are used to address bytes within the block, so they need to be masked
out.
comparison, M19-M13 = 0 to mask these address bits, MRW = 0 to enable the chip
select for both read and write, and CFC = 0 to mask off function code comparison).
care, and EN =1 to enable the chip select.
The mask bits in the OR are used to mask the individual address
bits, so in the previous example, if bit 12 (M23) was changed to
a zero, then CS2 would assert for a 1 Megabyte block beginning
at $200000 and a 1 Megabyte block at $A00000.
Figure 3-10. Using an External Crystal
C1
C2
MC68302 USER’S MANUAL
NOTE
R
MC68302
EXTAL
XTAL
using a parallel resonant crystal.
System Integration Block (SIB)
3-49