MC68302EH16C Freescale Semiconductor, MC68302EH16C Datasheet - Page 126

• Manufacturer Part Number: MC68302EH16C
• Description: IC MPU MULTI-PROTOCOL 132-PQFP
• Manufacturer: Freescale Semiconductor

Specifications of MC68302EH16C

• Processor Type: M683xx 32-Bit
• Speed: 16MHz
• Voltage: 5V
• Mounting Type: Surface Mount
• Package / Case: 132-MQFP, 132-PQFP
• Controller Family/series: 68K
• Core Size: 32 Bit
• Ram Memory Size: 1152Byte
• Cpu Speed: 16MHz
• No. Of Timers: 3
• Embedded Interface Type: SCP, TDM
• Digital Ic Case Style: PQFP
• Rohs Compliant: Yes
• Family Name: M68000
• Device Core: ColdFire
• Device Core Size: 32b
• Frequency (max): 16MHz
• Instruction Set Architecture: RISC
• Supply Voltage 1 (typ): 5V
• Operating Temp Range: 0C to 70C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 132
• Package Type: PQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Features: -
• Lead Free Status / Rohs Status: RoHS Compliant part Electrostatic Device

Communications Processor (CP)
OPCODE—Command Opcode
OPCODE—Command Opcode (GCI Mode Only)
Bit 3—Reserved bit; should be set to zero.
CH. NUM.—Channel Number
4-6
These bits are set by the M68000 core to define the specific SCC command. The precise
meaning of each command below depends on the protocol chosen.
The detailed command description for the UART protocol is presented in 4.5.11 UART
Controller.
The detailed command description for the HDLC protocol is presented in 4.5.12 HDLC
Controller.
The detailed command description for the BISYNC protocol is presented in 4.5.13 BI-
SYNC Controller.
The detailed command description for the DDCMP protocol is presented in 4.5.14 DDC-
MP Controller.
The detailed command description for the V.110 protocol is presented in 4.5.15 V.110
Controller.
The detailed command description for the transparent protocol is presented in 4.5.16
Transparent Controller.
These bits are set by the M68000 core to define the specific GCI command. See 4.7 Serial
Management Controllers (SMCs) for more details.
These bits are set by the M68000 core to define the specific SCC channel that the com-
mand is to operate upon.
00 = STOP TRANSMIT Command
01 = RESTART TRANSMIT Command
10 = ENTER HUNT MODE Command
11 = RESET RECEIVER BCS CALCULATION (used only in BISYNC mode)
1 = When GCI is set in conjunction with the opcode bits, the two GCI commands
00 = TRANSMIT ABORT REQUEST; the GCI receiver sends an abort request on the
01 = TIMEOUT Command
10 = Reserved
11 = Reserved
00 = SCC1
01 = SCC2
10 = SCC3
11 = Reserved
(ABORT REQUEST and TIMEOUT) are generated. The accompanying CH. NUM.
should be 10, and FLG should be set.
E bit.
MC68302 USER’S MANUAL
MOTOROLA