MC68302EH16C Freescale Semiconductor, MC68302EH16C Datasheet - Page 433

IC MPU MULTI-PROTOCOL 132-PQFP

MC68302EH16C

Manufacturer Part Number
MC68302EH16C
Description
IC MPU MULTI-PROTOCOL 132-PQFP
Manufacturer
Freescale Semiconductor

Specifications of MC68302EH16C

Processor Type
M683xx 32-Bit
Speed
16MHz
Voltage
5V
Mounting Type
Surface Mount
Package / Case
132-MQFP, 132-PQFP
Controller Family/series
68K
Core Size
32 Bit
Ram Memory Size
1152Byte
Cpu Speed
16MHz
No. Of Timers
3
Embedded Interface Type
SCP, TDM
Digital Ic Case Style
PQFP
Rohs Compliant
Yes
Family Name
M68000
Device Core
ColdFire
Device Core Size
32b
Frequency (max)
16MHz
Instruction Set Architecture
RISC
Supply Voltage 1 (typ)
5V
Operating Temp Range
0C to 70C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Pin Count
132
Package Type
PQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Features
-
Lead Free Status / Rohs Status
RoHS Compliant part Electrostatic Device

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E.1.1.4.1 Receive BD Control/Status Word. To initialize the buffer, the user should write
bits 15-12 and clear bits 11-10 and 5-0. The IMP clears bit 15 when the buffer is closed and
sets bits 5-0 depending on which error occurred.
E—Empty
X—External Buffer
W—Wrap (final BD in table)
I—Interrupt (The RXF bit in the event register is set when a complete frame is received,
independent of the I bit.)
L—Last in Frame
F—First in Frame
Bits 9–6—Reserved for future use
LG—Rx Frame Length Violation
NO—Rx Nonoctet Aligned Frame
AB—Rx Abort Sequence
MOTOROLA
0 = This data buffer is full or has been closed due to an error condition.
1 = This data buffer is empty; must be set by the user to enable reception into this buff-
0 = The data buffer associated with this BD is in internal dual-port RAM.
1 = The data buffer associated with this BD is in external memory.
0 = This is not the last BD in the receive BD table.
1 = This is the last BD in the receive BD table.
0 = The RXB bit in the event register is not set when this buffer is closed.
1 = The RXB bit (or RXF bit, if this is the last buffer in a frame) in the event register is
0 = This buffer is not the last buffer in a frame.
1 = This buffer is the last buffer in a frame.
0 = This buffer is not the first buffer in a frame.
1 = This buffer is the first buffer in a frame.
0 = No frame length violation occurred.
1 = A frame length violation was detected. Up to the number of bytes specified in the
0 = An octet aligned frame was received.
1 = A nonoctet aligned frame was received.
0 = No abort was received.
1 = A minimum of seven ones was received during frame reception.
er.
set when this buffer is closed.
maximum frame length will be written to the buffer (or buffers, if multiple buffers per
frame).
MC68360 USER’S MANUAL
SCC Programming Reference
E-11

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