MC68302EH16C Freescale Semiconductor, MC68302EH16C Datasheet - Page 312

• Manufacturer Part Number: MC68302EH16C
• Description: IC MPU MULTI-PROTOCOL 132-PQFP
• Manufacturer: Freescale Semiconductor

Specifications of MC68302EH16C

• Processor Type: M683xx 32-Bit
• Speed: 16MHz
• Voltage: 5V
• Mounting Type: Surface Mount
• Package / Case: 132-MQFP, 132-PQFP
• Controller Family/series: 68K
• Core Size: 32 Bit
• Ram Memory Size: 1152Byte
• Cpu Speed: 16MHz
• No. Of Timers: 3
• Embedded Interface Type: SCP, TDM
• Digital Ic Case Style: PQFP
• Rohs Compliant: Yes
• Family Name: M68000
• Device Core: ColdFire
• Device Core Size: 32b
• Frequency (max): 16MHz
• Instruction Set Architecture: RISC
• Supply Voltage 1 (typ): 5V
• Operating Temp Range: 0C to 70C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 132
• Package Type: PQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Features: -
• Lead Free Status / Rohs Status: RoHS Compliant part Electrostatic Device

Electrical Characteristics
6.13 AC ELECTRICAL SPECIFICATIONS—CHIP-SELECT TIMING
6-24
NOTE:
Num.
1.This specification is valid only when the ADCE or WPVE bits in the SCR are set.
2.For loading capacitance less than or equal to 50 pF, subtract 4 ns from the maximum value given.
3.Since AS and CS are asserted/negated on the same CLKO edges, no AS to CS relative timings can be
150
151
152
153
154
155
156
157
158
171
172
173
174
175
176
177
178
See Figure 6-2 and Figure 6-3 for diagrams.
specified. However, CS timings are given relative to a number of other signals, in the same manner as AS.
INTERNAL MASTER
Clock High to CS, IACK Low (see Note 2)
Clock Low to CS, IACK High (see Note 2)
CS Width Negated
Clock High to DTACK Low (0 Wait State)
Clock Low to DTACK Low (1–6 Wait
States)
Clock Low to DTACK High
Clock High to BERR Low (see Note 1)
Clock Low to BERR High Impedance (see
Note 1)
DTACK High to DTACK High Impedance
Input Data Hold Time from S6 Low
CS Negated to Data-Out Invalid (Write)
Address, FC Valid to CS Asserted
CS Negated to Address, FC Invalid
CS Low Time (0 Wait States)
CS Negated to R/W Invalid
CS Asserted to R/W Low (Write)
CS Negated to Data-In Invalid (Hold Time
on Read)
Characteristic
(see Figure 6-14)
MC68302 USER’S MANUAL
t
t
t
DTKHDTKZ
Symbol
CHCSIAKL
CLCSIAKH
t
t
t
t
t
t
t
t
t
t
CSARWL
t
CHDTKL
CLDTKH
CHBERL
CLBERH
AFVCSA
CSNRWI
CLDTKL
CSNDOI
t
CSNAFI
CSNDII
t
IDHCL
t
CSLT
CSH
Min
16.67 MHz
120
60
10
15
15
10
—
—
—
—
—
—
—
0
0
5
0
Max
40
40
45
30
40
40
40
15
10
—
—
—
—
—
—
—
—
Min
100
50
10
15
15
10
—
—
—
—
—
—
—
0
0
5
0
20 MHz
Max
35
35
—
40
25
35
35
35
15
—
—
—
—
—
—
10
—
Min
40
15
12
80
—
—
—
—
—
—
—
0
0
5
7
7
0
25 MHz
Max
MOTOROLA
27
27
30
20
27
27
27
10
—
—
—
—
—
—
—
—
8
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns