MC68302EH16C Freescale Semiconductor, MC68302EH16C Datasheet - Page 324

• Manufacturer Part Number: MC68302EH16C
• Description: IC MPU MULTI-PROTOCOL 132-PQFP
• Manufacturer: Freescale Semiconductor

Specifications of MC68302EH16C

• Processor Type: M683xx 32-Bit
• Speed: 16MHz
• Voltage: 5V
• Mounting Type: Surface Mount
• Package / Case: 132-MQFP, 132-PQFP
• Controller Family/series: 68K
• Core Size: 32 Bit
• Ram Memory Size: 1152Byte
• Cpu Speed: 16MHz
• No. Of Timers: 3
• Embedded Interface Type: SCP, TDM
• Digital Ic Case Style: PQFP
• Rohs Compliant: Yes
• Family Name: M68000
• Device Core: ColdFire
• Device Core Size: 32b
• Frequency (max): 16MHz
• Instruction Set Architecture: RISC
• Supply Voltage 1 (typ): 5V
• Operating Temp Range: 0C to 70C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 132
• Package Type: PQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Features: -
• Lead Free Status / Rohs Status: RoHS Compliant part Electrostatic Device

Electrical Characteristics
6.22 AC ELECTRICAL SPECIFICATIONS—NMSI TIMING
The NMSI mode uses two clocks
internal or external. When t he clock is internal
erator and it is output on TCLK or RCLK. All the timing is related to the external clock pin.
The timing is specified for NMSI1. It is also valid for NMSI2 and NMSI3 (see Figure 6-24).
NOTES:
6-36
Num.
316a RCLK1 and TCLK1 High
1. The ratio CLKO/TCLK1 and CLKO/RCLK1 must be greater than or equal to 2.5/1 for external clock. The input clock
2. Also applies to CD hold time when CD is used as an external sync in BISYNC or totally transparent mode.
3. Schmitt triggers used on input buffers.
4. Where P = 1/CLKO. Thus, for a 16.67-MHz CLKO rate, P = 60 ns.
315
316
317
318
319
320
321
322
323
to the baud rate generator may be either an internal clock or TIN1, and may be as fast as EXTAL. However, the
output of the baud rate generator must provide a CLKO/TCLK1 and CLKO/RCLK1 ratio greater than or equal to 3/1.
In asynchronous mode (UART), the bit rate is 1/16 of the TCLK1/RCLK1 clock rate.
RCLK1 and TCLK1 Fre-
quency (see Note 1)
RCLK1 and TCLK1 Low
(see Note 4)
RCLK1 and TCLK1 Rise/Fall
TXD1 Active Delay from
TCLK1 Falling Edge
RTS1 Active/Inactive Delay
from TCLK1 Falling Edge
CTS1 Setup Time to TCLK1
RXD1 Setup Time to RCLK1
RXD1 Hold Time from
RCLK1 Rising Edge (see
Note 2)
CD1 Setup Time to RCLK1
Time (see Note 3)
Rising Edge
Rising Edge
Rising Edge
Characteristic
16.67 MHz 16.67 MHz
Min Max Min Max Min Max Min Max Min Max Min Max
65
65
50
50
10
50
—
—
Internal
0
0
Clock
,
MC68302 USER’S MANUAL
5.55
one for receive and one for transmit. Both clocks can be
20
40
40
—
—
—
—
—
—
P+10
External
55
10
10
50
10
— 6.668 —
—
Clock
0
0
100
70
—
—
—
—
—
—
—
,
it is generated by the internal baud rate gen-
55
55
40
40
40
—
Internal
20 MHz
7
0
0
Clock
6.66
17
30
30
—
—
—
—
—
—
P+10
External
45
40
—
—
20 MHz
0
0
7
7
7
Clock
50
80
—
—
—
—
—
—
—
8
45
45
35
35
35
—
—
Internal
25 MHz
7
0
0
Clock
8.33
14
25
25
—
—
—
—
—
—
P+10
External
35
35
—
—
25 MHz
0
0
7
7
7
Clock
MOTOROLA
10
40
65
—
—
—
—
—
—
—
MHz
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns