MC68302EH16C Freescale Semiconductor, MC68302EH16C Datasheet - Page 400

IC MPU MULTI-PROTOCOL 132-PQFP

MC68302EH16C

Manufacturer Part Number
MC68302EH16C
Description
IC MPU MULTI-PROTOCOL 132-PQFP
Manufacturer
Freescale Semiconductor

Specifications of MC68302EH16C

Processor Type
M683xx 32-Bit
Speed
16MHz
Voltage
5V
Mounting Type
Surface Mount
Package / Case
132-MQFP, 132-PQFP
Controller Family/series
68K
Core Size
32 Bit
Ram Memory Size
1152Byte
Cpu Speed
16MHz
No. Of Timers
3
Embedded Interface Type
SCP, TDM
Digital Ic Case Style
PQFP
Rohs Compliant
Yes
Family Name
M68000
Device Core
ColdFire
Device Core Size
32b
Frequency (max)
16MHz
Instruction Set Architecture
RISC
Supply Voltage 1 (typ)
5V
Operating Temp Range
0C to 70C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Pin Count
132
Package Type
PQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Features
-
Lead Free Status / Rohs Status
RoHS Compliant part Electrostatic Device

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MC68302 Applications
Example 2. If you only need one transparent channel (and you had all three physical inter-
face available), your six choices are as follows:
Example 3. If you need to interface one, two, or three transparent channels to a single time-
multiplexed bus, then the choice is simply PCM highway using SCC1 and (either SCC2 or
SCC3 or both).
Example 4. If you need to interface one, two, or three transparent channels to an lSDN ba-
sic rate bus, then the choices are as follows:
Since the purposes of GCI and IDL are clear, the real challenge is choosing between NMSI
and PCM. What are the advantages of PCM over NMSI? To really answer that, you will have
to take a more detailed look at the timings discussed in the following paragraphs. However,
one general statement can be made: PCM mode allows better control over how data is gat-
ed into and out of the SCC, but requires that data is transmitted and received simultaneously
on the SCC. (There are no separate TCLK and RCLK pins in PCM mode. Instead, there is
one clock pin (L1 CLK) that clocks transmit and receive data whenever the syncs are acti-
vated).
The choice of physical interface is made in the serial interface mode register (SIMODE);
$0000 is the default value and sets all three SCCs to use the NMSI interface. As another
example, the value $0009 chooses SCC1 and SCC2 to use the PCM mode and SCC3 to
use the NMSI interface.
D.8.4 General Transparent Mode Behavior
Transparent mode is entered by selecting the BISYNC mode and setting the NTSYN bit in
the SCC mode register (SCM). In most applications, it is also customary to set the EXSYN
bit in the SCM as well. No other SCM bits are valid in transparent mode except REVD, which
allows the bit ordering for each byte of the transmitted and received data to be reversed be-
fore sending it out or storing it in memory.
All transfers to and from memory in transparent mode are 16 bits to maximize performance.
All bits in the transmit buffer are transmitted out of the SCC in transparent mode, regardless
D-50
1. NMSI1 using SCC1
2. PCM (i.e., NMSI1 is converted into PCM pins) using SCC1
3. GCI (i.e., NMSI1 is converted into GCI pins) using SCC1
4. IDL (i.e., NMSI1 is converted into IDL pins) using SCC1
5. NMSI2 using SCC2
6. NMSI3 using SCC3
1. IDL using SCC1 and (either SCC2 or SCC3 or both)
2. GCI using SCC1 and (either SCC2 or SCC3 or both)
The preceding four examples of physical interface combinations
apply equally well to other MC68302-supported protocols such
as HDLC.
MC68302 USER’S MANUAL
NOTE
MOTOROLA

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