MC68302EH16C Freescale Semiconductor, MC68302EH16C Datasheet - Page 129

IC MPU MULTI-PROTOCOL 132-PQFP

MC68302EH16C

Manufacturer Part Number
MC68302EH16C
Description
IC MPU MULTI-PROTOCOL 132-PQFP
Manufacturer
Freescale Semiconductor

Specifications of MC68302EH16C

Processor Type
M683xx 32-Bit
Speed
16MHz
Voltage
5V
Mounting Type
Surface Mount
Package / Case
132-MQFP, 132-PQFP
Controller Family/series
68K
Core Size
32 Bit
Ram Memory Size
1152Byte
Cpu Speed
16MHz
No. Of Timers
3
Embedded Interface Type
SCP, TDM
Digital Ic Case Style
PQFP
Rohs Compliant
Yes
Family Name
M68000
Device Core
ColdFire
Device Core Size
32b
Frequency (max)
16MHz
Instruction Set Architecture
RISC
Supply Voltage 1 (typ)
5V
Operating Temp Range
0C to 70C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Pin Count
132
Package Type
PQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Features
-
Lead Free Status / Rohs Status
RoHS Compliant part Electrostatic Device

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There are five serial channel physical interface combinations for the three SCCs (see Table
4-1).
The PCM highway interface is a flexible time-division multiplexed interface. It allows the
MC68302 to connect to popular time-slot interfaces such as T1 and CEPT as well as user-
defined time-slot interfaces.
The IDL and GCI (IOM-2) interfaces are used to connect to semiconductor devices that sup-
port the Integrated Services Digital Network (ISDN). IDL and GCI allow the MC68302 to
communicate over any of the 2B + D ISDN basic rate channels.
MOTOROLA
NOTE: MUX is defined as one of the following: IDL, GCI, or PCM highway.
OR BRG2
OR BRG3
TCLK2
TCLK3
BRG1
SCC1
SCC2
SCC3
SCC
Figure 4-4. Multiplexed Mode on SCC1 Opens Additional
Table 4-1. The Five Possible SCC Combinations
NMSI
NMSI
NMSI
SCC3
SCC1
SCC2
1
BRG
BRG
BRG
Configuration Possibilities
MC68302 USER’S MANUAL
MC68302
NMSI
NMSI
MUX
2
SERIAL CHANNELS
MUX
PHYSICAL I/F
NMSI
MUX
MUX
3
MUX
MSC3 = 1
MSC2 = 1
Communications Processor (CP)
NMSI
MUX
MUX
4
NMSI2 PINS OR
P I/O IF MUX IS CHOSEN
NMSI3 PINS OR
P I/O IF MUX IS CHOSEN
LAYER 1 PINS.
MUX = (IDL, GCI, OR PCM)
MUX
MUX
MUX
5
4-9

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