MC68302EH16C Freescale Semiconductor, MC68302EH16C Datasheet - Page 214
MC68302EH16C
Manufacturer Part Number
MC68302EH16C
Description
IC MPU MULTI-PROTOCOL 132-PQFP
Manufacturer
Freescale Semiconductor
Datasheets
1.MC68302AG20C.pdf
(4 pages)
2.MC68302AG20C.pdf
(2 pages)
3.MC68302AG20C.pdf
(13 pages)
4.MC68302EH16C.pdf
(481 pages)
Specifications of MC68302EH16C
Processor Type
M683xx 32-Bit
Speed
16MHz
Voltage
5V
Mounting Type
Surface Mount
Package / Case
132-MQFP, 132-PQFP
Controller Family/series
68K
Core Size
32 Bit
Ram Memory Size
1152Byte
Cpu Speed
16MHz
No. Of Timers
3
Embedded Interface Type
SCP, TDM
Digital Ic Case Style
PQFP
Rohs Compliant
Yes
Family Name
M68000
Device Core
ColdFire
Device Core Size
32b
Frequency (max)
16MHz
Instruction Set Architecture
RISC
Supply Voltage 1 (typ)
5V
Operating Temp Range
0C to 70C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Pin Count
132
Package Type
PQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Features
-
Lead Free Status / Rohs Status
RoHS Compliant part
Electrostatic Device
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- MC68302AG20C PDF datasheet
- MC68302AG20C PDF datasheet #2
- MC68302AG20C PDF datasheet #3
- MC68302EH16C PDF datasheet #4
- Current page: 214 of 481
- Download datasheet (2Mb)
Communications Processor (CP)
X—External Buffer
W—Wrap (Final BD in Table)
I—Interrupt
The following status bits are written by the CP after the received data has been placed into
the associated data buffer.
C—Control Character
B—BCS Received
Bits 9–5—Reserved for future use.
DL—DLE Follow Character Error
PR—Parity Error
4-94
The last byte in the buffer is a user-defined control character.
The last bytes in the buffer contain the received BCS.
While in transparent mode, a DLE character was received, and the next character was not
DLE, SYNC, or a valid entry in the control characters table.
A character with a parity error was received and is the last byte of this buffer.
0 = The buffer associated with this BD is in internal dual-port RAM.
1 = The buffer associated with this BD is in external memory.
0 = This is not the last BD in the Rx BD table.
1 = This is the last BD in the Rx BD table. After this buffer has been used, the CP will
0 = No interrupt is generated after this buffer has been used.
1 = The RX bit in the BISYNC event register will be set when this buffer has been
0 = The last byte of this buffer does not contain a control character.
1 = The last byte of this buffer contains a control character.
0 = This buffer does not contain the BCS.
1 = This buffer contains the BCS. A control character may also reside one byte prior to
should not write to any fields of this BD when this bit is set. The empty bit will re-
main set while the CP is currently filling the buffer with received data.
receive incoming data into the first BD in the table. Setting this bit allows the use
of fewer than eight BD to conserve internal RAM.
closed by the BISYNC controller, which can cause an interrupt.
this BCS.
The user is required to set the wrap bit in one of the first eight
BDs; otherwise, errant behavior may occur.
MC68302 USER’S MANUAL
NOTE
MOTOROLA
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