MC68302EH16C Freescale Semiconductor, MC68302EH16C Datasheet - Page 66

IC MPU MULTI-PROTOCOL 132-PQFP

MC68302EH16C

Manufacturer Part Number
MC68302EH16C
Description
IC MPU MULTI-PROTOCOL 132-PQFP
Manufacturer
Freescale Semiconductor

Specifications of MC68302EH16C

Processor Type
M683xx 32-Bit
Speed
16MHz
Voltage
5V
Mounting Type
Surface Mount
Package / Case
132-MQFP, 132-PQFP
Controller Family/series
68K
Core Size
32 Bit
Ram Memory Size
1152Byte
Cpu Speed
16MHz
No. Of Timers
3
Embedded Interface Type
SCP, TDM
Digital Ic Case Style
PQFP
Rohs Compliant
Yes
Family Name
M68000
Device Core
ColdFire
Device Core Size
32b
Frequency (max)
16MHz
Instruction Set Architecture
RISC
Supply Voltage 1 (typ)
5V
Operating Temp Range
0C to 70C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Pin Count
132
Package Type
PQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Features
-
Lead Free Status / Rohs Status
RoHS Compliant part Electrostatic Device

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System Integration Block (SIB)
3.2.1 Overview
An overview of IMP interrupt processing is presented in the following paragraphs.
3.2.1.1 IMP Interrupt Processing Overview
Interrupt processing on the IMP involves four steps. A typical sequence of these four steps
is as follows:
3-16
• DTACK Generation When Vectors Supplied Internally
1. The interrupt controller on the IMP collects interrupt events from on and off-chip pe-
2. The M68000 responds to the interrupt request by executing an interrupt acknowledge
ripherals, prioritizes them, and presents the highest priority request to the M68000
core.
PB8-PB11
TIMERS
SMCs
DMA
SCP
SCC1 EVENT
SCC2 EVENT
SCC3 EVENT
SCC2 MASK
SCC1 MASK
SCC3 MASK
REGISTER
REGISTER
REGISTER
REGISTER
REGISTER
REGISTER
(8 BITS)
(8 BITS)
(8 BITS)
(8 BITS)
(8 BITS)
(8 BITS)
Figure 3-2. Interrupt Controller Block Diagram
3
1
2
2
4
1
1
1
MC68302 USER’S MANUAL
M68000 CORE
DATA BUS
IRQ7/
IPL2
GENERATION
INTERRUPT
RESOLVER
PRIORITY
VECTOR
LOGIC
IRQ6/
IPL1
IRQ1/
IPL0
M68000 CORE
IPL2–IPL0 TO
MOTOROLA
IACK1
IACK6
IACK7

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