MC68302EH16C Freescale Semiconductor, MC68302EH16C Datasheet - Page 408

IC MPU MULTI-PROTOCOL 132-PQFP

MC68302EH16C

Manufacturer Part Number
MC68302EH16C
Description
IC MPU MULTI-PROTOCOL 132-PQFP
Manufacturer
Freescale Semiconductor

Specifications of MC68302EH16C

Processor Type
M683xx 32-Bit
Speed
16MHz
Voltage
5V
Mounting Type
Surface Mount
Package / Case
132-MQFP, 132-PQFP
Controller Family/series
68K
Core Size
32 Bit
Ram Memory Size
1152Byte
Cpu Speed
16MHz
No. Of Timers
3
Embedded Interface Type
SCP, TDM
Digital Ic Case Style
PQFP
Rohs Compliant
Yes
Family Name
M68000
Device Core
ColdFire
Device Core Size
32b
Frequency (max)
16MHz
Instruction Set Architecture
RISC
Supply Voltage 1 (typ)
5V
Operating Temp Range
0C to 70C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Pin Count
132
Package Type
PQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Features
-
Lead Free Status / Rohs Status
RoHS Compliant part Electrostatic Device

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MC68302 Applications
In the Tx BD, the last (L) bit should be set, and the TB, BR, TD, and TR bits should be
cleared. In each Rx BD, the CR bit, which indicates a bad BCS, should be ignored.
If all the frames are of a fixed length, you do not need to use ETX. Instead, disable the whole
control character table, and set the MRBLR to the frame length. If MRBLR = 2, for example,
then you can send and receive the following frame types:
where syn is a one-byte sync character that cannot be sent as data.
To be able to send the sync character within the data stream requires full BlSYNC capabil-
ities in a mode called BISYNC transparent, which is not discussed in this subsection.
D.8.6.2 TRANSYNC MODE. In the normal transparent mode examples discussed previ-
ously, both the NTSYN and the EXSYN bits were set in the SCM register. Also, different
ways of using BISYNC mode have been described in which both the NTSYN and EXSYN
bits are cleared. However, what happens if you set NTSYN and clear EXSYN? The answer
is a combination of transparent and BISYNC modes that is referred to here as TRANSYNC.
On the transmission side, normal transparent operation takes place with no sync characters
transmitted. On the receive side, however, reception will not be synchronized until the pat-
tern in the DSR is matched on the line. In other words, the CD (sync) function is eliminated
on transmit and is replaced with the DSR matching function on receive. Recall that CD and
CTS can still control transmission and reception in TRANSYNC mode if the DIAG1-DIAG0
bits are set for normal mode and not software operation mode.
D.8.7 Gating Clocks in NMSI Mode
If the behavior of CTS and CD (sync) are not what is needed for an application, there is al-
ways the possibility of gating clocks to the SCC. The term “gating clocks” usually means pro-
viding clocks to an SCC only while it is in the act of transmitting or receiving, but at no other
time. Gating clocks is a requirement in some multidrop applications and can be useful for
many special applications. Gating clocks is only possible if the clocks are inputs to the SCC
since the internal SCC baud rate generators do not support gating clocks.
The gating of clocks can provide extra control over the transmission and reception of data,
albeit with extra logic external to the MC68302. The SCCs are designed with static logic;
thus, the clock signal may be held in a constant high/low state for any period of time. When-
ever clocks are provided externally (and especially when they are gated), care should be
taken to avoid glitches, excessive ringing, and very long rise/fall times in a very noisy envi-
ronment. If the minimum clock high/low time is violated, erratic operation can result, which
can cause an SCC to immediately transition to an error state such as underrun or overrun.
D-58
syn-syn-Data-Data-syn-syn-syn-syn-Data-Data-syn-syn
When NTSYN is cleared and EXSYN is set, the result is normal
BISYNC mode except that the external synchronization function,
CD (sync), is required for proper reception. Syncs are transmit-
ted in this mode, but are not required on receive. This is the op-
posite of TRANSYNC mode.
MC68302 USER’S MANUAL
NOTE
MOTOROLA

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