MCF5253VM140J Freescale Semiconductor, MCF5253VM140J Datasheet - Page 608

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MCF5253VM140J

Manufacturer Part Number
MCF5253VM140J
Description
IC MCU 2.1MIPS 140MHZ 225MAPBGA
Manufacturer
Freescale Semiconductor
Series
MCF525xr

Specifications of MCF5253VM140J

Core Processor
Coldfire V2
Core Size
32-Bit
Speed
140MHz
Connectivity
CAN, EBI/EMI, I²C, QSPI, UART/USART, USB OTG
Peripherals
DMA, WDT
Program Memory Type
ROMless
Ram Size
128K x 8
Voltage - Supply (vcc/vdd)
1.08 V ~ 1.32 V
Data Converters
A/D 6x12b
Oscillator Type
External
Operating Temperature
-20°C ~ 70°C
Package / Case
225-MAPBGA
Processor Series
MCF525x
Core
ColdFire V2
3rd Party Development Tools
JLINK-CF-BDM26, EWCF
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Number Of I /o
-
Eeprom Size
-
Program Memory Size
-
Lead Free Status / Rohs Status
 Details

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Quantity
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Part Number:
MCF5253VM140J
Manufacturer:
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Quantity:
10 000
Universal Serial Bus Interface
24.11.5.5 Flushing/De-Priming an Endpoint
It is necessary for the DCD to flush to de-prime one more endpoints on a USB device reset or during a
broken control transfer. There may also be application specific requirements to stop transfers in progress.
The following procedure can be used by the DCD to stop a transfer in progress:
24.11.5.6 Device Error Matrix
Table 24-88
Notice that the device controller handles all errors on Bulk/Control/Interrupt Endpoints except for a data
buffer overflow. However, for ISO endpoints, errors packets are not retried and errors are tagged as
indicated.
24-146
Overflow
ISO Packet Error
ISO Fulfillment Error Host failed to complete the number of packets defined in the dQH mult field within the given
1. Write a '1' to the corresponding bit(s) in ENDPTFLUSH.
2. Wait until all bits in ENDPTFLUSH are '0'.
3. Software note: this operation may take a large amount of time depending on the USB bus activity.
4. Read ENDPTSTATUS to ensure that for all endpoints commanded to be flushed, that the
Overflow **
ISO Packet Error
ISO Fulfillment Error
It is not desirable to have this wait loop within an interrupt service routine.
corresponding bits are now '0'. If the corresponding bits are '1' after step #2 has finished, then the
flush failed as described in the following:
Explanation: In very rare cases, a packet is in progress to the particular endpoint when commanded
flush using ENDPTFLUSH. A safeguard is in place to refuse the flush to ensure that the packet in
progress completes successfully. The DCD may need to repeatedly flush any endpoints that fail to
flush be repeating steps 1-3 until each endpoint is successfully flushed.
Error
summarizes packet errors that are not automatically handled by the USB_DR.
Number of bytes received exceeded max. packet size or total buffer length.
** This error will also set the Halt bit in the dQH and if there are dTDs remaining in the linked list for the
endpoint, then those will not be executed.
CRC Error on received ISO packet. Contents not guaranteed to be correct.
(micro)frame. For scheduled data delivery the DCD may need to readjust the data queue because a
fulfillment error will cause Device Controller to cease data transfers on the pipe for one (micro)frame.
During the ‘dead’(micro)frame, the Device Controller reports error on the pipe and primes for the
following frame.
Error
Table 24-88. Device Error Matrix
MCF5253 Reference Manual, Rev. 1
Table 24-89. Error Descriptions
Direction
Both
RX
RX
Description
Packet
Type
Any
ISO
ISO
Data Buffer
Error Bit
1
0
0
Freescale Semiconductor
Transaction
Error Bit
0
1
1

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