MCF5253VM140J Freescale Semiconductor, MCF5253VM140J Datasheet - Page 249

• Manufacturer Part Number: MCF5253VM140J
• Description: IC MCU 2.1MIPS 140MHZ 225MAPBGA
• Manufacturer: Freescale Semiconductor
• Series: MCF525xr

Specifications of MCF5253VM140J

• Core Processor: Coldfire V2
• Core Size: 32-Bit
• Speed: 140MHz
• Connectivity: CAN, EBI/EMI, I²C, QSPI, UART/USART, USB OTG
• Peripherals: DMA, WDT
• Program Memory Type: ROMless
• Ram Size: 128K x 8
• Voltage - Supply (vcc/vdd): 1.08 V ~ 1.32 V
• Data Converters: A/D 6x12b
• Oscillator Type: External
• Operating Temperature: -20°C ~ 70°C
• Package / Case: 225-MAPBGA
• Processor Series: MCF525x
• Core: ColdFire V2
• 3rd Party Development Tools: JLINK-CF-BDM26, EWCF
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Number Of I /o: -
• Eeprom Size: -
• Program Memory Size: -
• Lead Free Status / Rohs Status: Details

The UART module interrupt level in the MCF5253 interrupt controller is programmed external to the
UART module. The UART can be configured to supply the vector from the UART Interrupt Vector
Register (UIVR) or the SIM can be programmed to provide an autovector when a UART interrupt is
acknowledged.
The interrupt level, priority within the level, and autovectoring capability can also be programmed in the
SIM register ICR_U1.
15.2
The following paragraphs contain a brief description of the UART module signals.
the external and internal signal groups.
15.2.1
The multiplexed signals TXD0/GPIO45, SCL1/TXD1/GPIO10 and XTRIM/TXD2/GPIO0 can be
programmed as general purpose outputs or transmitter serial data outputs. When used as transmitters, the
output is held high ('‘mark’' condition) when the transmitter is disabled, idle, or operating in the local
loopback mode. Data is shifted out on this signal on the falling edge of the clock source, with the least
significant bit transmitted first.
15.2.2
The multiplexed signals RXD0/GPIO46, SDA1/RXD1/GPIO44, and EF/RXD2/GPIO6 can be
programmed as general purpose inputs or receiver serial data inputs. When used as receivers, data received
on this signal is sampled on the rising edge of the clock source, with the least significant bit received first.
Freescale Semiconductor
UART Module Signal Definitions
Transmitter Serial Data Output
Receiver Serial Data Input
The terms assertion and negation are used throughout this chapter to avoid
confusion when dealing with a mixture of active-low and active-high
signals. The term assert or assertion indicates that a signal is active or true,
independent of the level represented by a high or low voltage. The term
negate or negation indicates that a signal is inactive or false.
MCF5253 Reference Manual, Rev. 1
NOTE
Figure 15-2
UART Modules
shows both
15-3