MCF5253VM140J Freescale Semiconductor, MCF5253VM140J Datasheet - Page 307

• Manufacturer Part Number: MCF5253VM140J
• Description: IC MCU 2.1MIPS 140MHZ 225MAPBGA
• Manufacturer: Freescale Semiconductor
• Series: MCF525xr

Specifications of MCF5253VM140J

• Core Processor: Coldfire V2
• Core Size: 32-Bit
• Speed: 140MHz
• Connectivity: CAN, EBI/EMI, I²C, QSPI, UART/USART, USB OTG
• Peripherals: DMA, WDT
• Program Memory Type: ROMless
• Ram Size: 128K x 8
• Voltage - Supply (vcc/vdd): 1.08 V ~ 1.32 V
• Data Converters: A/D 6x12b
• Oscillator Type: External
• Operating Temperature: -20°C ~ 70°C
• Package / Case: 225-MAPBGA
• Processor Series: MCF525x
• Core: ColdFire V2
• 3rd Party Development Tools: JLINK-CF-BDM26, EWCF
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Number Of I /o: -
• Eeprom Size: -
• Program Memory Size: -
• Lead Free Status / Rohs Status: Details

Figure 17-4
provides the description of the bit fields.
Freescale Semiconductor
Address MBAR2 + 0x18 (reset 0x0fc8) (IIS3config)
Address MBAR2 + 0x14 (reset 0x0fc8)
.
.
Reset
Reset
Reset
Reset
EF/CFLG
W
W
R
R
W
W
CFLG
R
R
Field
MBAR2 + 0x1C (reset 0x0fc8) (IIS4config(SCLK4))
31
15
0
0
31
15
0
0
illustrates the valid bits in the IIS3 and IIS4 (SCLK4) Configuration Registers and
CLOCKSEL
CLOCKSEL
30
14
30
14
0
0
0
0
Figure 17-4. IIS3 and IIS4 (SCLK4) Configuration Registers (0x18, 0x1C)
EF/CFLG insert. See note 16
0 Not active
1 Active
CFLG sample position. See note 16
0 Sample CFLG input 1 SCLK clock after incoming LRCK edge
1 Sample CFLG input 6 SCLK clocks before incoming LRCK edge
29
13
0
0
29
13
0
0
Table 17-5. IIS Configuration Registers Field Descriptions
28
12
0
0
28
12
0
0
Figure 17-3. IIS2 Configuration Registers (0x14)
CONTROL
TX FIFO
27
11
1
1
27
11
0
1
MCF5253 Reference Manual, Rev. 1
26
10
0
1
26
10
0
1
TXSOURCE
SELECT
25
0
1
9
25
0
1
9
24
0
1
8
24
0
1
8
23
0
1
7
23
0
1
7
SIZE
SIZE
Description
22
22
0
1
0
1
6
6
MODE
MODE
21
0
0
21
5
0
0
5
FREQUENCY
20
0
0
4
20
0
0
4
FREQUENCY
LRCK
19
LRCK
1
1
3
19
0
1
3
18
0
0
2
Audio Interface Module (AIM)
Access: User read/write
18
0
0
Access: User read/write
2
INVERT
LRCK
17
0
1
0
INVERT
LRCK
17
0
1
0
TXSOURCE
Table 17-5
SELECT
INVERT
SCLK
INVERT
16
0
0
0
SCLK
16
0
0
0
17-9