MCF5253VM140J Freescale Semiconductor, MCF5253VM140J Datasheet - Page 181

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MCF5253VM140J

Manufacturer Part Number
MCF5253VM140J
Description
IC MCU 2.1MIPS 140MHZ 225MAPBGA
Manufacturer
Freescale Semiconductor
Series
MCF525xr

Specifications of MCF5253VM140J

Core Processor
Coldfire V2
Core Size
32-Bit
Speed
140MHz
Connectivity
CAN, EBI/EMI, I²C, QSPI, UART/USART, USB OTG
Peripherals
DMA, WDT
Program Memory Type
ROMless
Ram Size
128K x 8
Voltage - Supply (vcc/vdd)
1.08 V ~ 1.32 V
Data Converters
A/D 6x12b
Oscillator Type
External
Operating Temperature
-20°C ~ 70°C
Package / Case
225-MAPBGA
Processor Series
MCF525x
Core
ColdFire V2
3rd Party Development Tools
JLINK-CF-BDM26, EWCF
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Number Of I /o
-
Eeprom Size
-
Program Memory Size
-
Lead Free Status / Rohs Status
 Details

Available stocks

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Part Number
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Quantity
Price
Part Number:
MCF5253VM140J
Manufacturer:
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Quantity:
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1
2
10.4.2
The various chip select registers in the module are described in this section.
10.4.2.1
The Chip Select Address registers (CSARx) determine the base address of the corresponding chip select
pin. These read/write registers are 32-bit in length.
Freescale Semiconductor
MBAR + 0x8C
MBAR + 0x9C
MBAR + 0xAE
MBAR + 0xBA
MBAR + 0x8A
MBAR + 0xA2
MBAR + 0xA4
MBAR + 0xA8
MBAR + 0xB0
MBAR + 0xB4
MBAR + 0x90
MBAR + 0x96
MBAR + 0x98
Addresses not assigned to a register and undefined register bits are reserved for future expansion. Write accesses to these
reserved address spaces and reserved register bits are undefined.
The reset value column indicates the register initial value at reset.
Address
1
Chip Select Module Registers
Chip Select Address Register
CSMR1
CSMR2
CSMR3
CSMR4
CSCR0
CSAR1
CSCR1
CSAR2
CSCR2
CSAR3
CSCR3
CSAR4
CSCR4
Name
Table 10-2. Memory Map of Chip-Select Registers (continued)
Width
16
16
32
16
16
32
16
16
32
16
16
32
16
Chip-Select Control Register–Bank 0
Chip-Select Address Register–Bank 1
Chip-Select Mask Register–Bank 1
Chip-Select Control Register–Bank 1
Chip-Select Address Register–IDE
Chip-Select Mask Register–IDE
Chip-Select Control Register–IDE
Chip-Select Address Register–Bank 3
Chip-Select Mask Register–Bank 3
Chip-Select Control Register–Bank 3
Chip-Select Address Register–Bank 4
Chip-Select Mask Register–Bank 4
Chip-Select Control Register–Bank 4
MCF5253 Reference Manual, Rev. 1
Description
WS3 = WS2 = WS1 = WS0 = 1
BSTR = BSTW = 0;
(except V = 0)
(except V = 0)
(except V = 0)
(except V = 0)
AA = 1; PS =;
Uninitialized
Uninitialized
Uninitialized
Uninitialized
Uninitialized
Uninitialized
Uninitialized
Uninitialized
Uninitialized
Uninitialized
Uninitialized
Uninitialized
Reset
2
Chip Select Module
Access
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
10-5

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