MCF5253VM140J Freescale Semiconductor, MCF5253VM140J Datasheet - Page 364

• Manufacturer Part Number: MCF5253VM140J
• Description: IC MCU 2.1MIPS 140MHZ 225MAPBGA
• Manufacturer: Freescale Semiconductor
• Series: MCF525xr

Specifications of MCF5253VM140J

• Core Processor: Coldfire V2
• Core Size: 32-Bit
• Speed: 140MHz
• Connectivity: CAN, EBI/EMI, I²C, QSPI, UART/USART, USB OTG
• Peripherals: DMA, WDT
• Program Memory Type: ROMless
• Ram Size: 128K x 8
• Voltage - Supply (vcc/vdd): 1.08 V ~ 1.32 V
• Data Converters: A/D 6x12b
• Oscillator Type: External
• Operating Temperature: -20°C ~ 70°C
• Package / Case: 225-MAPBGA
• Processor Series: MCF525x
• Core: ColdFire V2
• 3rd Party Development Tools: JLINK-CF-BDM26, EWCF
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Number Of I /o: -
• Eeprom Size: -
• Program Memory Size: -
• Lead Free Status / Rohs Status: Details

Boot ROM
This mode supports booting from the following:
In slave mode, the MCF5253 will wait for communication from a controlling MCU and store the code it
receives in RAM. It executes this code after receiving an execute command. The controlling MCU must
control the data transfer and handle error recovery if required.
This mode supports booting from the following:
19.2
19.2.1
19.2.1.1
19.2.1.2
The boot ROM data resides in the upper range of the internal SRAM.
The SRAM allocation is as follows:
0x1001FC90 – 0x1001FF13Bootloader uninitialized data (HDD) (644 bytes)
0x1001FF14 – 0x1001FF3FBootloader uninitialized data (Serial) (44 bytes)
0x1001FF40 – 0x1001FFFFBootloader Stack (192 bytes)
Initialization sequence
_Boot:
;
19-2
•
•
•
•
•
bootrom:origin = 0x00000000, length = 0x00002000
mbar:origin = 0xb0000000, length = 0x10000000
mbar2:origin = 0xc0000000, length = 0x40000000
sram1:origin = 0x10000000, length = 0x00010000
sram0:origin = 0x10010000, length = 0x00010000
I
SPI connected slave device
Hard Disk Drive (IDE)
I
UART connected master
2
2
C connected slave device
C connected master device
Boot ROM Operation
move.w
move.l
movec
/* Invalidate the cache and disable it */
move.l
movec
Initialization
Boot ROM Memory map
Internal SRAM usage
The HDD data space is available for use when booting from a serial device.
If the user routine exceeds the assigned stack allocation, then it would be
more appropriate for the user to define their own stack space, especially if
the user routine returns to the bootloader.
#0x2700,SR
#VECTOR_TABLE,d0
d0,VBR
#0x01000000,d0
d0,cacr
MCF5253 Reference Manual, Rev. 1
NOTE
Freescale Semiconductor