MCF5253VM140J Freescale Semiconductor, MCF5253VM140J Datasheet - Page 340

• Manufacturer Part Number: MCF5253VM140J
• Description: IC MCU 2.1MIPS 140MHZ 225MAPBGA
• Manufacturer: Freescale Semiconductor
• Series: MCF525xr

Specifications of MCF5253VM140J

• Core Processor: Coldfire V2
• Core Size: 32-Bit
• Speed: 140MHz
• Connectivity: CAN, EBI/EMI, I²C, QSPI, UART/USART, USB OTG
• Peripherals: DMA, WDT
• Program Memory Type: ROMless
• Ram Size: 128K x 8
• Voltage - Supply (vcc/vdd): 1.08 V ~ 1.32 V
• Data Converters: A/D 6x12b
• Oscillator Type: External
• Operating Temperature: -20°C ~ 70°C
• Package / Case: 225-MAPBGA
• Processor Series: MCF525x
• Core: ColdFire V2
• 3rd Party Development Tools: JLINK-CF-BDM26, EWCF
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Number Of I /o: -
• Eeprom Size: -
• Program Memory Size: -
• Lead Free Status / Rohs Status: Details

Audio Interface Module (AIM)
Both DMA1REQ and DMA0REQ can be routed to DMA channel 0 or DMA channel 1.
17.9
The Phase/Frequency determination function can be used to determine when a software sample rate
convertor should be enabled and provide the necessary control to steer the sample rate convertor clock
(when the incoming sample rate is other than 44.1 kHz). This applies to IIS inputs and the EBU input.
In addition, the Phase/Frequency determination function can also be used to determine when the incoming
IEC958 clock does not match the phase of the CRIN clock and use the XTRIM function to trim the CRIN
source to match (within a 150ppm range). Typically, when the IEC958 input is being used, the CRIN clock
requires trimming to match but this is only when the source is completely external to the application and
when any audio output must be synchronous to the input source.
When the source is internal to the application, such as from a CD player controlled by the processor, then
the input sample rate does not need to match the output sample rate, they can be asynchronous. When FIFO
under-run or over-run occurs, requests can be made to re-read the lost data by the system.
17.9.1
A frequency measurement block exists to allow precise measurement of an incoming sampling frequency.
This can be used in conjunction with the XTRIM output (and with the appropriate control s/w) to “lock”
the clock being input to CRIN (either external generated clock or crystal) to the recovered SPDIF audio
clock - if so desired. Some external hardware is required for this including a set of varicap diodes.
17-42
Address MBAR2 + 0x9F
Reset
•
•
•
W
R
If PDIR2 is full and DMAConfig(0) is set to ‘0’, DMA0REQ is activated.
If the FIFO connected to PDOR3 is empty, and DMAConfig(1) is set ‘1’, DMA1REQ is activated.
If the FIFO connected to PDOR3 is empty, and DMAConfig(0) is set to ‘1’, DMA0REQ is
activated.
Phase/Frequency Determination and XTRIM Function
Incoming Source Frequency Measurement
–
7
–
6
Table 17-23. DMA Config Register Field Descriptions
Figure 17-23. DMA Config Register
MCF5253 Reference Manual, Rev. 1
–
5
DMA1REQ
DMA0REQ
Bit Name
4
–
0 PDIR2
1 PDOR3
0 PDIR2
1 PDOR3
Description
–
3
–
2
DMA1req
Freescale Semiconductor
Access: User read/write
0
1
DMA0req
0
0