MCF5253VM140J Freescale Semiconductor, MCF5253VM140J Datasheet - Page 37

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MCF5253VM140J

Manufacturer Part Number
MCF5253VM140J
Description
IC MCU 2.1MIPS 140MHZ 225MAPBGA
Manufacturer
Freescale Semiconductor
Series
MCF525xr

Specifications of MCF5253VM140J

Core Processor
Coldfire V2
Core Size
32-Bit
Speed
140MHz
Connectivity
CAN, EBI/EMI, I²C, QSPI, UART/USART, USB OTG
Peripherals
DMA, WDT
Program Memory Type
ROMless
Ram Size
128K x 8
Voltage - Supply (vcc/vdd)
1.08 V ~ 1.32 V
Data Converters
A/D 6x12b
Oscillator Type
External
Operating Temperature
-20°C ~ 70°C
Package / Case
225-MAPBGA
Processor Series
MCF525x
Core
ColdFire V2
3rd Party Development Tools
JLINK-CF-BDM26, EWCF
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Number Of I /o
-
Eeprom Size
-
Program Memory Size
-
Lead Free Status / Rohs Status
 Details

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MCF5253VM140J
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
Freescale Semiconductor
— The XTRIM output can be used to trim an external crystal oscillator circuit which would allow
USB 2.0 high-speed on-the-go (OTG)
— Compliant with OTG supplement to the USB 2.0 specification
— Operates as high speed, full speed and low speed host, and as high speed and full speed device
— Host negotiation protocol and session request protocol are implemented with software support,
— On-chip USB 2.0 High-speed compatible PHY
ATA Controller
— Main use of this block is to interface with IDE hard disc drives and ATAPI optical disc drives.
— Supports ATA6 pio modes 0, 1, 2, 3, and 4; multiword DMA modes 0, 1, and 2; ultra DMA
Twin Controller Area Network (CAN) 2.0B Communication Unit
— The controller is a full implementation of the Bosch CAN protocol specification 2.0B, which
Real-time Clock
— Works with 32.768 kHz X-tal
— Anti-tamper feature detects if clock was stopped by removing battery
Audio Interfaces
— SPDIF (IEC958) inputs and output
— Three serial Philips IIS/Sony EIAJ interfaces
CD Text Interface
— Allows the interface of CD subcode (transmitter only)
Three Universal Asynchronous Receivers/Transmitters (UARTn)
— Full duplex operation
— Baud-rate generator
— Modem control signals: clear-to-send (CTS) and request-to-send (RTS) for UART0/1 only.
— DMA interrupt capability
— Processor-interrupt capability
Queued Serial Peripheral Interface (QSPI)
— Programmable queue to support up to 16 transfers without user intervention
— Supports transfer sizes of 8 to 16 bits in 1-bit increments
— Four peripheral chip-select lines for control of up to 15 devices
— Supports Baud rates up to 17.5 Mbps at 140 MHz
— Programmable delays before and after transfers
lock with an incoming IEC958 or serial audio signal
but also controllable by software.
modes 0, 1, 2, and 3.
supports both standard and extended message frames.
– One with input and output, one with output only and one with input only (Two inputs, two
– Master and Slave operation
outputs)
MCF5253 Reference Manual, Rev. 1
MCF5253 Introduction
1-5

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