MCF5253VM140J Freescale Semiconductor, MCF5253VM140J Datasheet - Page 126

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MCF5253VM140J

Manufacturer Part Number
MCF5253VM140J
Description
IC MCU 2.1MIPS 140MHZ 225MAPBGA
Manufacturer
Freescale Semiconductor
Series
MCF525xr

Specifications of MCF5253VM140J

Core Processor
Coldfire V2
Core Size
32-Bit
Speed
140MHz
Connectivity
CAN, EBI/EMI, I²C, QSPI, UART/USART, USB OTG
Peripherals
DMA, WDT
Program Memory Type
ROMless
Ram Size
128K x 8
Voltage - Supply (vcc/vdd)
1.08 V ~ 1.32 V
Data Converters
A/D 6x12b
Oscillator Type
External
Operating Temperature
-20°C ~ 70°C
Package / Case
225-MAPBGA
Processor Series
MCF525x
Core
ColdFire V2
3rd Party Development Tools
JLINK-CF-BDM26, EWCF
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Number Of I /o
-
Eeprom Size
-
Program Memory Size
-
Lead Free Status / Rohs Status
 Details

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MCF5253VM140J
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
Synchronous DRAM Controller Module
Next, this information is mapped to an address to determine the hexadecimal value.
Although A[31:20] corresponds to the address programmed in DACR0, according to how DACR0 and
DMR0 are initialized, bit 19 must be set to hit in the SDRAM. Thus, before the mode register bit is set,
DMR0[19] must be set to enable masking.
7.6.6
The following assembly code initializes the SDRAM example.
Power-Up Sequence:
Precharge Sequence:
7-22
Setting
Setting
(hex)
(hex)
Field
Field
move.w
move.w
move.l
move.l
move.l
move.l
move.l
move.l
move.l
move.l
MCF5253 Pins
Initialization Code
31
15
0
#0x8012, d0
d0, DCR
#0xFF881220, d0
d0, DACR0
#0x00740075, d0
d0, DMR0
#0xFF881228, d0
d0, DACR0
#0xBEADDEED, d0
d0, 0xFF880000
A22
A21
A20
A15
A16
30
14
0
0
1
29
13
0
Figure 7-17. Mode Register Mapping to MCF5253 A[31:0]
Table 7-17. Mode Register Initialization (continued)
28
12
1
SDRAM Pins
27
11
0
BA1 / A13
BA0 / A12
MCF5253 Reference Manual, Rev. 1
A11
A1
A0
26
10
0
0
0
//Write to memory location to init. precharge
25
0
9
24
8
23
7
Mode Register Initialization
Reserved
22
0
6
BL
BL
0
0
21
0
5
20
0
4
//Initialize DACR0
//Initialize DMR0
//Initialize DCR
//Set DACR0[IP]
19
0
3
Freescale Semiconductor
18
0
2
0
0
0
0
0
0
0
17
0
1
16
V
0
0

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