MCF5253VM140J Freescale Semiconductor, MCF5253VM140J Datasheet - Page 173
MCF5253VM140J
Manufacturer Part Number
MCF5253VM140J
Description
IC MCU 2.1MIPS 140MHZ 225MAPBGA
Manufacturer
Freescale Semiconductor
Series
MCF525xr
Datasheets
1.MCF5253VM140J.pdf
(34 pages)
2.MCF5253VM140J.pdf
(8 pages)
3.MCF5253VM140J.pdf
(648 pages)
4.MCF5253VM140J.pdf
(2 pages)
Specifications of MCF5253VM140J
Core Processor
Coldfire V2
Core Size
32-Bit
Speed
140MHz
Connectivity
CAN, EBI/EMI, I²C, QSPI, UART/USART, USB OTG
Peripherals
DMA, WDT
Program Memory Type
ROMless
Ram Size
128K x 8
Voltage - Supply (vcc/vdd)
1.08 V ~ 1.32 V
Data Converters
A/D 6x12b
Oscillator Type
External
Operating Temperature
-20°C ~ 70°C
Package / Case
225-MAPBGA
Processor Series
MCF525x
Core
ColdFire V2
3rd Party Development Tools
JLINK-CF-BDM26, EWCF
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Number Of I /o
-
Eeprom Size
-
Program Memory Size
-
Lead Free Status / Rohs Status
Details
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
MCF5253VM140J
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
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9.9
The MCF5253 has a number of pins which are multiplexed with both a primary function, a secondary
function, and a GPIO function (triple functionality). Two pins have 3 major functions (a primary and two
secondary functions). Two pins also have their multiplexed functions selected at power-on reset via
external pull-up / pull-down resistors.
At Power-on RESET the primary function (the function listed first in the pin name) is enabled. The GPIO
function is selected as required by setting the appropriate bit in the GPIO-FUNCTION or
GPIO1-FUNCTION registers as described in
To enable the secondary function the appropriate Pin Configuration register bit needs to be set.
Note: in all cases the GPIO FUNCTION register setting has priority. Therefore it is necessary to set the
appropriate GPIO FUNCTION bit to 0 to enable the primary or secondary function.
Freescale Semiconductor
GPIO-Function
Bit Number
GPIO-OUT
GPIO-EN
16
15
14
13
12
11
10
6
3
9
8
7
5
4
2
1
0
Multiplexed Pin Configuration
Table 9-29. General-Purpose Output Register Bits to Pins Mapping (continued)
EBUIN3/CMD_SDIO2/GPIO14
QSPICS1/EBUOUT2/GPIO16
EBUIN2/SCLKOUT/GPIO13
QSPICS0/EBUIN4/GPIO15
DDATA1/RTS1/SDATA2_
DDATA0/CTS1/SDATA0_
DDATA3/RTS0/GPIO4
DDATA2/CTS0/GPIO3
SCL1/TXD1/GPIO10
XTRIM/TXD2/GPIO0
EF/RXD2/GPIO6
MCLK1/GPIO11
SDATAI3/GPIO8
Associated Pin
SDIO1/GPIO1
CFLG/GPIO5
BS2/GPIO2
TA/GPIO12
none
none
MCF5253 Reference Manual, Rev. 1
Pin Type
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
Section 9.8, “General Purpose
GPIO1-Function
GPIO1-OUT
Bit Number
GPIO1-EN
45
43
48
47
46
44
42
41
40
39
38
37
36
35
34
33
32
SCL0/SDATA1_BS1/GPIO41
LRCK3/AUDIOCLK/GPIO43
PST2/INTMON2/GPIO48
PST3/INTMON1/GPIO47
SDA0/SDATA3/GPIO42
SDA1/RXD1/GPIO44
IDE_IORDY/GPIO33
IDE_DIOW/GPIO32
EBUOUT1/GPIO37
SDATAO2/GPIO34
EBUIN1/GPIO36
SDCAS/GPIO39
Associated Pin
SCLK3/GPIO35
SDWE/GPIO38
RXD0/GPIO46
BCLK/GPIO40
TXD0/GPIO45
I/Os”.
System Integration Module (SIM)
Pin Type
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
9-29
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