MCF5253VM140J Freescale Semiconductor, MCF5253VM140J Datasheet - Page 222

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MCF5253VM140J

Manufacturer Part Number
MCF5253VM140J
Description
IC MCU 2.1MIPS 140MHZ 225MAPBGA
Manufacturer
Freescale Semiconductor
Series
MCF525xr

Specifications of MCF5253VM140J

Core Processor
Coldfire V2
Core Size
32-Bit
Speed
140MHz
Connectivity
CAN, EBI/EMI, I²C, QSPI, UART/USART, USB OTG
Peripherals
DMA, WDT
Program Memory Type
ROMless
Ram Size
128K x 8
Voltage - Supply (vcc/vdd)
1.08 V ~ 1.32 V
Data Converters
A/D 6x12b
Oscillator Type
External
Operating Temperature
-20°C ~ 70°C
Package / Case
225-MAPBGA
Processor Series
MCF525x
Core
ColdFire V2
3rd Party Development Tools
JLINK-CF-BDM26, EWCF
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Number Of I /o
-
Eeprom Size
-
Program Memory Size
-
Lead Free Status / Rohs Status
 Details

Available stocks

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Part Number
Manufacturer
Quantity
Price
Part Number:
MCF5253VM140J
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
IDE and Flash Media Interface
13.5.6.1
The send-command sequence first sends out a command on the CMD line, then receives a card response
on the same CMD line. After receiving the card response, the host may drive the CMD and DATA lines
depending on the values of the DRIVECMDMASK and DRIVEDATAMASK.
While the host is sending data and receiving status from the card, it must look for events on the
SHIFTBUSY2 status bit in the FLASHMEDIASTATUS register. It is also possible to capture these events
using the SHIFTBUSY2RISE and SHIFTBUSY2FALL interrupts.
To exchange data with the card, the host must write the FLASHMEDIADATA2 register when
TX2EMPTY is set, or read FLASHMEDIADATA2 when RCV2FULL is set. This can be done by using
interrupts, by polling FLASHMEDIAINTSTAT, or by using a DMA channel on FLASHMEDIADATA2.
A number of bits/bytes/longwords corresponding with CMDBITCOUNT must be written to
FLASHMEDIADATA2 during the command transmission. All words, except the first word, contain 32
bits of data. The first word contains the remainder. The data in the first word is left-justified. No CRC logic
is present in hardware, so CRC must be inserted by software.
A number of bits/bytes/longwords corresponding with RESPBITCOUNT must be read from
FLASHMEDIADATA2 during the response phase. All words, except the first word, contain 32 bits of
13-24
shift_busy2
DATA lines
bitcounter2
Read data from card (one or more packets)
Write data to card (one or more packets)
CMD line
Note 1: If driveCmdMask = 0x40000, CMD line is driven P after receiving card response
Note 2: If driveDataMask = 0x80000, DATA lines are driven P after receiving CMD response.
Note 3:To stop host driving P on cmd or data lines, write FLASHMEDIACMD2 with driveDataMask or driveCmdMask 0
Note 4: Host interface will stop SCLK_OUT clock when needed to prevent transmit underrun or receive overrun. (not shown)
write
FLASHMEDIACMD2 =
0x60000 +
cmdBitCount +
driveCmdMask +
driveDataMask
If driveCmdMask = 0, CMD line is not driven (Z) after receiving card response
If driveDataMask = 0, DATA lines are not driven (Z) after receiving CMD response.
Send Command to Card
Both lines must be driven if the next operation is sending a data packet to
the card. The CMD line must be driven, while DATA lines are kept Z when
the next operation is receiving data from the card. Both CMD and DATA
lines are kept Z when no data follows the command.
Z
Z
S
write one or more
times to
FLASHMEDIADATA2
cmdBitCount
Host command
Figure 13-23. Send Command to Card
MCF5253 Reference Manual, Rev. 1
E
Z
Z
NOTE
P P
P
write
FLASHMEDIACMD2 =
rspBitCount +
driveCmdMask +
driveDataMask
S
Card driving bus
rspBitCount
Card Response
read one or more
times from
FLASHMEDIADATA2
E
Z
P Z P Z P Z P Z Z
P Z P Z P Z P Z Z
note 1
note 2
Freescale Semiconductor
write
FLASHMEDIACMD2 = 0

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