MCF5253VM140J Freescale Semiconductor, MCF5253VM140J Datasheet - Page 585

• Manufacturer Part Number: MCF5253VM140J
• Description: IC MCU 2.1MIPS 140MHZ 225MAPBGA
• Manufacturer: Freescale Semiconductor
• Series: MCF525xr

Specifications of MCF5253VM140J

• Core Processor: Coldfire V2
• Core Size: 32-Bit
• Speed: 140MHz
• Connectivity: CAN, EBI/EMI, I²C, QSPI, UART/USART, USB OTG
• Peripherals: DMA, WDT
• Program Memory Type: ROMless
• Ram Size: 128K x 8
• Voltage - Supply (vcc/vdd): 1.08 V ~ 1.32 V
• Data Converters: A/D 6x12b
• Oscillator Type: External
• Operating Temperature: -20°C ~ 70°C
• Package / Case: 225-MAPBGA
• Processor Series: MCF525x
• Core: ColdFire V2
• 3rd Party Development Tools: JLINK-CF-BDM26, EWCF
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Number Of I /o: -
• Eeprom Size: -
• Program Memory Size: -
• Lead Free Status / Rohs Status: Details

transfer descriptor) is copied into the overlay area of the dQH, which starts at the nextTD pointer DWord
and continues through the end of the buffer pointers DWords. After a transfer is complete, the dTD status
DWord is updated in the dTD pointed to by the currentTD pointer. While a packet is in progress, the
overlay area of the dQH is used as a staging area for the dTD so that the Device Controller can access
needed information with little minimal latency.
Figure 24-61
24.10.1.1 Endpoint Capabilities/Characteristics
This DWord specifies static information about the endpoint, in other words, this information does not
change over the lifetime of the endpoint. Device Controller software should not attempt to modify this
information while the corresponding endpoint is enabled.
Freescale Semiconductor
1
2
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
31–30
Mult zlt
00
Device controller read/write; all others read-only.
Offsets 0x08 through 0x20 contain the transfer overlay.
Bit
Name
Mult
00
shows the Endpoint Queue Head structure.
Mult. This field is used to indicate the number of packets executed per transaction description as given by
the following:
00 Execute N Transactions as demonstrated by the USB variable length packet protocol where N is
01 Execute 1 Transaction.
10 Execute 2 Transactions.
11 Execute 3 Transactions.
Note: Non-ISO endpoints must set Mult = 00.
Note: ISO endpoints must set Mult = 01, 10, or 11 as needed.
Maximum Packet Length
Buffer Pointer (Page 0)
Buffer Pointer (Page 1)
Buffer Pointer (Page 2)
Buffer Pointer (Page 3)
Buffer Pointer (Page 4)
Total Bytes
computed using the Maximum Packet Length (dQH) and the Total Bytes field (dTD)
Table 24-74. Endpoint Capabilities/Characteristics
1
Figure 24-61. Endpoint Queue Head Layout
Current dTD Pointer
Next dTD Pointer
MCF5253 Reference Manual, Rev. 1
1
1
1
1
1
Set-up Buffer Bytes 3–0
Set-up Buffer Bytes 7–4
ioc
ios
15
Reserved
1
1
14
1
000
13 12 11
Description
MultO
1
1
10
1
000_0000_0000_0000
9
00
8
Current Offset
7
Reserved
Reserved
Reserved
Reserved
6
5
4
Status
Universal Serial Bus Interface
1
3
0000
0_0000
1
2
1
T
0
1
Offset
0x0C
0x1C
0x08
0x10
0x14
0x18
0x20
0x2C
0x00
0x04
0x24
0x28
24-123
2
2
2
2
2
2
2