MCF5253VM140J Freescale Semiconductor, MCF5253VM140J Datasheet - Page 380

• Manufacturer Part Number: MCF5253VM140J
• Description: IC MCU 2.1MIPS 140MHZ 225MAPBGA
• Manufacturer: Freescale Semiconductor
• Series: MCF525xr

Specifications of MCF5253VM140J

• Core Processor: Coldfire V2
• Core Size: 32-Bit
• Speed: 140MHz
• Connectivity: CAN, EBI/EMI, I²C, QSPI, UART/USART, USB OTG
• Peripherals: DMA, WDT
• Program Memory Type: ROMless
• Ram Size: 128K x 8
• Voltage - Supply (vcc/vdd): 1.08 V ~ 1.32 V
• Data Converters: A/D 6x12b
• Oscillator Type: External
• Operating Temperature: -20°C ~ 70°C
• Package / Case: 225-MAPBGA
• Processor Series: MCF525x
• Core: ColdFire V2
• 3rd Party Development Tools: JLINK-CF-BDM26, EWCF
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Number Of I /o: -
• Eeprom Size: -
• Program Memory Size: -
• Lead Free Status / Rohs Status: Details

Background Debug Mode (BDM) Interface
20.3.3
ColdFire supports a subset of BDM commands to provide access to new hardware features. The BDM
commands must not be issued when the ColdFire processor is accessing the debug module registers using
the WDEBUG instruction, or the resulting behavior is undefined.
20.3.3.1
The BDM command set is summarized in
of each command.
20-10
MODULE REGISTER
MODULE REGISTER
WRITE CONTROL
WRITE MEMORY
READ CONTROL
DUMP MEMORY
NO OPERATION
READ MEMORY
WRITE DEBUG
FILL MEMORY
READ DEBUG
EXECUTION
WRITE A/D
REGISTER
REGISTER
REGISTER
REGISTER
LOCATION
LOCATION
Command
READ A/D
RESUME
BLOCK
BLOCK
BDM Command Set
BDM Command Set Summary
WAREG/WDREG The data operand is written to the specified
RAREG/RDREG Read the selected address or data register and
Mnemonic
WDMREG
RDMREG
WCREG
RCREG
WRITE
DUMP
READ
NOP
FILL
GO
Table 20-5. BDM Command Summary
return results through the serial interface.
address or data register.
Read the data at the memory location specified
by the longword address.
Write the operand data to the memory location
specified by the longword address.
Used with the READ command to dump large
blocks of memory. An initial READ is executed to
set up the starting address of the block and to
retrieve the first result. Subsequent operands
are retrieved with the DUMP command.
Used with the WRITE command to fill large
blocks of memory. An initial WRITE is executed
to set up the starting address of the block and to
supply the first operand. Subsequent operands
are written with the FILL command.
The pipeline is flushed and refilled before
execution resumes at the current PC.
NOP performs no operation and may be used as
a null command.
Read the system control register.
Write the operand data to the system control
register.
Read the debug module register.
Write the operand data to the debug module
register.
MCF5253 Reference Manual, Rev. 1
Table
20-5. Subsequent sections contain detailed descriptions
Description
Impact
Parallel
Parallel
Parallel
Halted
Halted
Halted
Halted
Halted
Steal
Steal
Steal
Steal
CPU
1
Freescale Semiconductor
$1C40–word
$1D80–long
$1C80–long
$1D00–byte
$1C00–byte
$1900–byte
$1980–long
$1800–byte
$1880–long
Command
$1D40–wd
$218 {A/D,
$208 {A/D,
$1940–wd
$1840–wd
DRc[4:0]}
Reg[2:0]}
Reg[2:0]}
$2D {$4†
$2C {$4†
Drc[4:0]}
$0C00
$0000
$2980
$2880
(HEX)
20.3.4.1.
1/20-13
20.3.4.1.
2/20-14
20.3.4.1.
3/20-14
20.3.4.1.
4/20-16
20.3.4.1.
5/20-17
20.3.4.1.
6/20-19
20.3.4.1.
7/20-21
20.3.4.1.
8/20-21
20.3.4.1.
9/20-22
20.3.4.1.
10/20-23
20.3.4.1.
11/20-24
20.3.4.1.
12/20-24
Section
Page