mcf51ac256a Freescale Semiconductor, Inc, mcf51ac256a Datasheet - Page 65

• Manufacturer Part Number: mcf51ac256a
• Description: Mcf51ac Flexis
• Manufacturer: Freescale Semiconductor, Inc

4.4.2.6
The FCMD register is the flash command register.
All FCMD bits are readable and writable during a command write sequence while bit 7 reads 0 and is not
writable.
4.4.3
Flash command operations are used to execute program, erase, and erase verify algorithms described in
this section. The program and erase algorithms are controlled by the flash memory controller whose time
base, FCLK, is derived from the bus clock via a programmable divider.
The next sections describe:
4.4.3.1
Prior to issuing any flash command after a reset, the user is required to write the FCDIV register to divide
the bus clock down to within the 150 kHz to 200 kHz range.
If we define:
then the FCDIV[PRDIV8, FDIV] bits must be set as described in
Freescale Semiconductor
Reset
FCMD
Field
1. How to write the FCDIV register to set FCLK
2. Command write sequences to program, erase, and erase verify operations on the flash memory
3. Valid flash commands
4. Effects resulting from illegal flash command write sequences or aborting flash operations
•
•
6–0
7
W
R
FCLK as the clock of the flash timing control block
INT(x) as taking the integer part of x (e.g. INT(4.323) = 4)
Flash Command Operations
Reserved, must be cleared.
Flash Command — Valid flash commands are shown below. Writing any command other than those listed sets
the FACCERR flag in the FSTAT register.
0x05 Erase Verify
0x20 Program
0x25 Burst Program
0x40 Sector Erase
0x41 Mass Erase
Flash Command Register (FCMD)
Writing the FCDIV Register
0
0
7
MCF51AC256 ColdFire Integrated Microcontroller Reference Manual, Rev. 5
0
6
Figure 4-8. Flash Command Register (FCMD)
Table 4-13. FCMD Field Descriptions
0
5
0
4
Description
FCMD
3
0
Figure
4-9.
0
2
0
1
0
Memory
0
4-21