mcf51ac256a Freescale Semiconductor, Inc, mcf51ac256a Datasheet - Page 534

• Manufacturer Part Number: mcf51ac256a
• Description: Mcf51ac Flexis
• Manufacturer: Freescale Semiconductor, Inc

Version 1 ColdFire Debug (CF1_DEBUG)
22.4.1.5.4
Provided XCSR[ENBDM] is set (BDM enabled), the BACKGROUND command causes the target MCU
to enter active background (halt) mode as soon as the current CPU instruction finishes. If ENBDM is
cleared (its default value), the BACKGROUND command is ignored.
A delay of 32 BDC clock cycles is required after the BACKGROUND command to allow the target MCU
to finish its current CPU instruction and enter active background mode before a new BDC command can
be accepted.
After the target MCU is reset into a normal operating mode, the host debugger would send a
WRITE_XCSR_BYTE command to set ENBDM before attempting to send the BACKGROUND
command the first time. Normally, the development host would set ENBDM once at the beginning of a
debug session or after a target system reset, and then leave the ENBDM bit set during debugging
operations. During debugging, the host would use GO commands to move from active background mode
to normal user program execution and would use BACKGROUND commands or breakpoints to return to
active background mode.
22.4.1.5.5
22-42
Enter active background mode (if enabled)
Read memory specified by debug address register, then
increment address
BACKGROUND
DUMP_MEM.sz, DUMP_MEM.sz_WS
MCF51AC256 ColdFire Integrated Microcontroller Reference Manual, Rev. 5
host →
host →
host →
host →
target
target
target
target
0x04
0x32
0x36
0x3A
D
D
D
D
L
Y
L
Y
L
Y
L
Y
data[31-24]
data[15-8]
data[7-0]
target →
target →
target →
Memory
Memory
Memory
host
host
host
data[23-16]
data[7-0]
target →
target →
Memory
Memory
DUMP_MEM.sz
host
host
data[15-8]
target →
Memory
host
data[7-0]
target →
Memory
host
Non-intrusive
Non-intrusive
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