mcf51ac256a Freescale Semiconductor, Inc, mcf51ac256a Datasheet - Page 101
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mcf51ac256a
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Mcf51ac Flexis
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Freescale Semiconductor, Inc
Datasheet
1.MCF51AC256A.pdf
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5.9.10
This high-page register contains control bits to enable or disable the bus clock to the TPM3, FTMx, ADC,
CAN, IIC, and SCIx modules. Gating off the clocks to unused peripherals is used to reduce the
microcontroller’s run and wait currents. See
Freescale Semiconductor
ADHWTS
Reset:
ACIC1
TPM3
FTM2
FTM1
Field
Field
ADC
1–0
2
7
6
5
4
W
R
TMP3
System Clock Gating Control 1 Register (SCGC1)
Analog Comparator 1 to Input Capture Enable— This bit connects the output of ACMP1 to FTM1 input
channel 0. See
more details on this feature.
0 ACMP output not connected to FTM1 input channel 0.
1 ACMP output connected to FTM1 input channel 0.
ADC Hardware Trigger Select— These bits select the source of the hardware trigger for the ADC module.
TPM3 Clock Gate Control — This bit controls the clock gate to the TPM3 module.
0 Bus clock to the TPM3 module is disabled.
1 Bus clock to the TPM3 module is enabled.
FTM2 Clock Gate Control — This bit controls the clock gate to the FTM2 module.
0 Bus clock to the FTM2 module is disabled.
1 Bus clock to the FTM2 module is enabled.
FTM1 Clock Gate Control — This bit controls the clock gate to the FTM1 module.
0 Bus clock to the FTM1 module is disabled.
1 Bus clock to the FTM1 module is enabled.
ADC Clock Gate Control — This bit controls the clock gate to the ADC module.
0 Bus clock to the ADC module is disabled.
1 Bus clock to the ADC module is enabled.
1
7
MCF51AC256 ColdFire Integrated Microcontroller Reference Manual, Rev. 5
Figure 5-11. System Clock Gating Control 1 Register (SCGC1)
Table 5-14. SOPT2 Register Field Descriptions (continued)
FTM2
Chapter 8, “Analog Comparator
1
6
Table 5-15. SCGC1 Register Field Descriptions
FTM1
1
5
Section 5.8, “Peripheral Clock Gating,”
ADHWTS
0:0
0:1
1:0
1:1
ADC
1
4
(ACMPV3),” and
Description
Description
Trigger Source
Reserved
CAN
ACMP1
FTM1
3
1
RTI
Chapter 11, “FlexTimer Module
Resets, Interrupts, and General System Control
IIC
1
2
for more information.
SCI2
1
1
(FTMV1),” for
SCI1
1
0
5-19
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