mcf51ac256a Freescale Semiconductor, Inc, mcf51ac256a Datasheet - Page 213

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mcf51ac256a

Manufacturer Part Number
mcf51ac256a
Description
Mcf51ac Flexis
Manufacturer
Freescale Semiconductor, Inc
Datasheet

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Freescale Semiconductor
ELSnB
ELSnA
MSnA
Field
3–2
4
COMBINE
X
0
Mode select A for FTM channel (n). Refer to the summary of channel mode and setup controls in
MSnA bit is write protected, this bit can only be written if WPDIS = 1.
Note: If the associated port pin is not stable for at least two system clock cycles before changing to input capture
Edge/level select bits. Depending upon the operating mode for the timer channel as set by
COMBINE:CPWMS:MSnB:MSnA bits and shown in
input signal is an input capture event or the level that will be driven in response to the channel or initial match
according to the selected output mode. ELSnB and ELSnA bits are write protected, these bits can only be written
if WPDIS = 1.
Setting ELSnB:ELSnA to 0:0 configures the related FTM pin as a general purpose I/O pin not related to any FTM
functions. This function is typically used to temporarily disable an input capture channel or to make the FTM pin
available as a general purpose I/O pin.
When ELSnB:ELSnA are set to 0:0 the associated FTM channel physical output is disabled however, compare
and match events will continue to set the appropriate flags.
mode, it is possible to get an unexpected indication of an edge trigger.
MCF51AC256 ColdFire Integrated Microcontroller Reference Manual, Rev. 5
CPWMS
X
0
1
Table 11-6. FTMxCnSC Field Descriptions (continued)
MSnB:MSnA
Table 11-7. Mode, Edge, and Level Selection
XX
XX
1X
00
01
ELSnB:ELSnA
X1
X1
00
01
10
11
01
10
11
10
10
Description
Table
11-7, these bits can select which edge of the channel
Pin not used for FTM - revert the channel pin
Output compare
Center-aligned
to general purpose I/O or other peripheral
Input capture
Edge-aligned
Mode
PWM
PWM
control
Toggle output on match
Capture on falling edge
Capture on rising edge
High-true pulses (clear
High-true pulses (clear
Clear output on match
Low-true pulses (set
Low-true pulses (set
Set output on match
output on match-up)
output on match-up)
Capture on rising or
output on match)
output on match)
Configuration
falling edge
FlexTimer Module (FTMV1)
only
only
Table
11-7.
11-13

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