mcf51ac256a Freescale Semiconductor, Inc, mcf51ac256a Datasheet - Page 449

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mcf51ac256a

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mcf51ac256a
Description
Mcf51ac Flexis
Manufacturer
Freescale Semiconductor, Inc
Datasheet

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20.3.4
This register has eight read-only status bits. Writes have no meaning or effect. This register has 4additional
flags RNFULLF, TNEARF, TXFULLF and RFIFOEF which provide mechanisms to support an 8-byte
FIFO mode. When in 8byte FIFO mode the function of SPRF and SPTEF differs slightly from the normal
buffered modes, mainly in how these flags are cleared by the amount available in the transmit and receive
FIFOs
Freescale Semiconductor
SPPR[2:0]
SPR[3:0]
Field
6:4
2:0
SPI Status Register (SPIxS)
SPI Baud Rate Prescale Divisor — This 3-bit field selects one of eight divisors for the SPI baud rate prescaler
as shown in
drives the input of the SPI baud rate divider (see
for details.
SPI Baud Rate Divisor — This 4-bit field selects one of nine divisors for the SPI baud rate divider as shown in
Table
Section 20.4.7, “SPI Baud Rate
20-7. The input to this divider comes from the SPI baud rate prescaler (see
MCF51AC256 ColdFire Integrated Microcontroller Reference Manual, Rev. 5
Table
SPR3:SPR2:SPR1:SPR0
SPPR2:SPPR1:SPPR0
20-6. The input to this prescaler is the bus rate clock (BUSCLK). The output of this prescaler
All other combinations
Table 20-5. SPIxBR Register Field Descriptions
Table 20-6. SPI Baud Rate Prescaler Divisor
0:0:0:0
0:0:0:1
0:0:1:0
0:0:1:1
0:1:0:0
0:1:0:1
0:1:1:0
0:1:1:1
1:0:0:0
0:0:0
0:0:1
0:1:0
0:1:1
1:0:0
1:0:1
1:1:0
1:1:1
Table 20-7. SPI Baud Rate Divisor
Generation,” for details.
Figure
Description
20-18). See
Prescaler Divisor
Rate Divisor
Reserved
128
256
512
16
32
64
1
2
3
4
5
6
7
8
2
4
8
Section 20.4.7, “SPI Baud Rate
16-Bit Serial Peripheral Interface (SPI16)
Figure
20-18). See
Generation,”
20-9

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