mcf51ac256a Freescale Semiconductor, Inc, mcf51ac256a Datasheet - Page 239

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mcf51ac256a

Manufacturer Part Number
mcf51ac256a
Description
Mcf51ac Flexis
Manufacturer
Freescale Semiconductor, Inc
Datasheet

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If (ELSnB:ELSnA = X:1) then the channel (n) output is forced low at the counter overflow (when the
FTMxCNTINH:FTMxCNTINL register contents are loaded into the FTM counter), and it is forced high
at the channel (n) match (when the FTM counter = FTMxCnVH:FTMxCnVL)
If (FTMxCnVH:FTMxCnVL = 0x0000) then the channel (n) output is a 0% duty cycle EPWM signal. If
(FTMxCnVH:FTMxCnVL > FTMxMODH:FTMxMODL) then the channel (n) output is a 100% duty
cycle EPWM signal. This implies that the modulus setting must be less than 0xFFFF in order to get a 100%
duty cycle EPWM signal.
11.4.7
The center-aligned mode is selected when:
The CPWM pulse width (duty cycle) is determined by 2 x (FTMxCnVH:FTMxCnVL -
FTMxCNTINH:FTMxCNTINL) and the period is determined by 2 x (FTMxMODH:FTMxMODL -
Freescale Semiconductor
(FTMEN = 0) and (COMBINE = 0) and (CPWMS = 1)
Center-aligned PWM (CPWM) mode
EPWM mode is only available when (FTMEN = 0) and
(FTMxCNTINH:FTMxCNTINL = 0x0000). EPWM mode with (FTMEN =
1) or (FTMxCNTINH:FTMxCNTINL not = 0x0000) is not recommended
and its results are not guaranteed.
FTMx
FTMx
FTMx
FTMx
MCF51AC256 ColdFire Integrated Microcontroller Reference Manual, Rev. 5
channel (n) output
MODH:L = 0x0008
CnVH:L = 0x0005
channel (n) output
MODH:L = 0x0008
CnVH:L = 0x0005
FTMxCNTH:
FTMxCNTH:
Figure 11-40. EPWM signal with ELSnB:ELSnA = X:1
Figure 11-39. EPWM signal with ELSnB:ELSnA = 1:0
CHnF bit
TOF bit
CHnF bit
TOF bit
overflow
counter
...
overflow
counter
...
0
previous value
0
previous value
1
1
2
NOTE
2
3
3
channel (n)
channel (n)
match
4
4
match
5
5
6
6
7
7
overflow
counter
8
overflow
counter
8
0
0
1
1
(Figure
2
2
FlexTimer Module (FTMV1)
...
...
11-40).
11-39

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