mcf51ac256a Freescale Semiconductor, Inc, mcf51ac256a Datasheet - Page 254
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mcf51ac256a
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Mcf51ac Flexis
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Freescale Semiconductor, Inc
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FlexTimer Module (FTMV1)
11.4.11.3 Boundary cycle
The CNTMAX and CNTMIN bits select the boundary cycle when the FTMxMODH:L and FTMxCnVH:L
registers will be updated with the value of their write buffer by PWM synchronization, except if (REINIT
= 1).
If (CNTMIN = 1) then the boundary cycle is the FTMxCNTINH:L value. Registers FTMxMODH:L and
FTMxCnVH:L are updated when the FTM counter reaches the FTMxCNTINH:L value. If (CPWMS = 0)
then FTMxCNTINH:L is reached when the FTM counter changes from FTMxMODH:L to
FTMxCNTINH:L. If (CPWMS = 1) then FTMxCNTINH:L is reached when the FTM counter changes
from (FTMxCNTINH:L + 0x0001) to FTMxCNTINH:L.
If (CNTMAX = 1) then the boundary cycle is the FTMxMODH:L value. Registers FTMxMODH:L and
FTMxCnVH:L are updated when the FTM counter reaches the FTMxMODH:L value. FTMxMODH:L is
reached when the FTM counter changes from (FTMxMODH:L - 0x0001) to FTMxMODH:L, regardless
of the CPWMS configuration.
If no boundary cycle was selected (that is, CNTMAX = 0 and CNTMIN = 0), then the update of the
FTMxMODH:L and FTMxCnVH:L registers would not be made, except if (REINIT = 1).
If both boundary cycles were selected (that is, CNTMAX = 1 and CNTMIN = 1), then the update of the
FTMxMODH:L and FTMxCnVH:L registers would be made in the first boundary cycle that occurs with
valid conditions for FTMxMODH:L or FTMxCnVH:L synchronization, except if (REINIT = 1).
The CNTMAX and CNTMIN bits are cleared only by software.
11-54
PWM synchronization boundary cycle is only available when (CNTMAX =
1). PWM synchronizaton with (CNTMIN = 1) is not recommended and its
results are not guaranteed.
write 1 to SWSYNC bit
PWM synchronization
software trigger event
MCF51AC256 ColdFire Integrated Microcontroller Reference Manual, Rev. 5
SWSYNC bit
system clock
Figure 11-63. Software trigger event
NOTE
Freescale Semiconductor
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