mcf51ac256a Freescale Semiconductor, Inc, mcf51ac256a Datasheet - Page 548

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mcf51ac256a

Manufacturer Part Number
mcf51ac256a
Description
Mcf51ac Flexis
Manufacturer
Freescale Semiconductor, Inc
Datasheet

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Version 1 ColdFire Debug (CF1_DEBUG)
Figure 22-23
command could be issued by the host.
Figure 22-24
occur if a pod device is connected to the target BKGD pin and the target is already executing a BDC
command. Consider that the target CPU is executing a pending BDC command at the exact moment the
pod is being connected to the BKGD pin. In this case, an ACK pulse is issued at the same time as the SYNC
command. In this case there is an electrical conflict between the ACK speedup pulse and the sync pulse.
Because this is not a probable situation, the protocol does not prevent this conflict from happening.
22-56
3. The host reads the channel status using a READ_XCSR_BYTE command.
4. If XCSR[CSTAT] is 000
BKGD PIN
then the status is okay; proceed
else
shows a SYNC command aborting a READ_MEM.B. After the command is aborted, a new
a shows a conflict between the ACK pulse and the sync request pulse. This conflict could
READ_MEM.B
Halt the CPU using a BDM BACKGROUND command
Repeat steps 1,2,3
If XCSR[CSTAT] is 000, then proceed, else reset the device
MCF51AC256 ColdFire Integrated Microcontroller Reference Manual, Rev. 5
READ_MEM.B CMD
IS ABORTED BY THE SYNC REQUEST
(NOT TO SCALE)
Figure 22-23. ACK Abort Procedure at the Command Level
HOST
Figure 22-23
ADDRESS[23-0]
TARGET
BDC DECODES
AND CPU TRYS TO EXECUTE
THE READ_MEM.B CMD
signal timing is not drawn to scale.
NOTE
READ_XCSR_BYTE
SYNC RESPONSE
FROM THE TARGET
(NOT TO SCALE)
HOST
TARGET
NEW BDC COMMAND
NEW BDC COMMAND
Freescale Semiconductor
HOST
TARGET

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